FMS: The Future of Memory and Storage is quickly approaching on Aug. 6-8, 2024, at the Santa Clara Convention Center, and has expanded its scope to encompass all tiers of Memory and Storage.

At this year’s PCI-SIG® US Developers Conference 2024, held on June 12-13 in Santa Clara, CA, the PCI-SIG Board of Directors recognized Gordon Getty of Teledyne LeCroy as the recipient of the 2024 Chairperson’s Award for h

Author’s Note: This blog discusses new functionality introduced in the PCIe 6.0 specification, but please note that subsequent revisions have been published. Developers should always work from the latest revision to ensure they see all specification errata.

The “Meet the PCI-SIG® Members” blog series is a way to highlight our diverse global membership that makes PCI-SIG what it is today. PCI-SIG members help to advance and promote PCI Express® (PCIe®) technology innovation in the industry, while receiving a variety of benefits.

Servers are challenged to process more intricate and diverse types of workloads in cloud, hybrid-cloud and enterprise data centers.

Author’s Note: This blog discusses new functionality introduced in the PCIe 6.0 specification, but please note that the PCIe 6.0.1 and PCIe 6.1 specification revisions have been published.

PCI-SIG® celebrated our 30-year milestone last year, and the “Meet the PCI-SIG Members” blog series is a way to highlight our diverse global membership that makes PCI-SIG what it is today.

Following the release of the PCI Express® (PCIe®) 6.0 specification to members earlier this year, PCI-SIG® had the unique opportunity to participate in three IT industry podcasts.

PCI-SIG® built upon our momentum from 2020 with another successful year in 2021. From progress on the PCIe 5.0 architecture compliance program to the impending release of the PCIe 6.0 specification, we have hit many exciting milestones.

I am excited to report that PCI-SIG has released PCIe 6.0 specification, version 0.9 to our members. This is a major milestone in our continued effort to double the data rate of the PCI Express® specifications while maintaining backwards compatibility.