PCI Express 6.0 Specification

PCI Express® (PCIe®) specification has served as the de facto interconnect of choice for nearly two decades. The PCIe 6.0 specification doubles the bandwidth and power efficiency of the PCIe 5.0 specification (32 GT/s), while continuing to meet industry demand for a high-speed, low-latency interconnect. PCIe 6.0 technology is the cost-effective and scalable interconnect solution for data-intensive markets like Data Center, Artificial Intelligence/Machine Learning, HPC, Automotive, IoT, and Military/Aerospace. 

PCIe 6.0 Specification Features 

  • 64 GT/s raw data rate and up to 256 GB/s via x16 configuration
  • Pulse Amplitude Modulation with 4 levels (PAM4) signaling, levraging existing PAM4 already available in the industry
  • Lightweight Forward Error Correct (FEC) and Cyclic Redundancy Check (CRC) mitigate the bit error rate increase associated with PAM4 signaling
  • Flit (flow control unit) based encoding supports PAM4 modulation and works in conjunction with the FEC and CRC to enable double the bandwidth gain
  • Updated Packet layout used in Flit Mode to provide additional functionality and simplify processing
  • Maintains backwards compatibility with all previous generations of PCIe technology

We invite members to download the PCIe 6.0 specification.

PCIe 6.0 Specification Resources 

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