PCI-SIG

News Releases

Cadence Announces New Low-Power IP for PCI Express 5.0 Specification on TSMC N5 Process
Synopsys Demonstrates Industry’s First PCI Express 5.0 IP Interoperability with Intel’s Future Xeon Scalable Processor
Astera Labs Announces Broad Availability of Aries Smart Retimers for PCIe® 4.0 and 5.0 Interconnects; Launches Cloud-Scale Interop Lab
Signal Quality Analyzer-R Series MP1900A Approved by PCI-SIG® as PCI Express® 4.0 Compliance Test Measuring Instrument
PLDA Achieves PCI Express® 4.0 Compliance for its XpressRICH™ PCIe® Controller IP During the First Official PCI-SIG® PCIe 4.0 Compliance Workshop

In the News

Electronic Design (August 19, 2021) PCI Express Leads the Way in IoT Connectivity
EE Times (August 10, 2021) Data Movement Depends on PCIe
HWSW (July 13, 2021) PCI Express 6.0 will be available soon (Roughly translated Hungarian)
CNBeta (July 2, 2021) PCI-SIG today released the PCI Express 6.0 draft version 0.71 and the final version will be released before the end of the year (Roughly translated Chinese)
TechNavi (May 27, 2021) Will PCI Gen 5 be fully marketed in 2022? PCI-SIG updates development status (Roughly translated Japanese)

Latest Blog Posts

CXL™ Consortium and PCI-SIG® Announce Marketing MOU Agreement

3 days 2 hours ago
PCI Express® Technology in Automotive Webinar Q&A: Accelerating the Future of In-Vehicle Connectivity

1 month 2 days ago
The PCIe® 6.0 Specification Webinar Q&A: A Deeper Dive into FLIT Mode, PAM4, and Forward Error Correction (FEC)

1 month 1 week ago
Connecting the Connected Car: The Evolution of the In-Vehicle Network

2 months 1 week ago
Next level unlocked! The PCIe 6.0 Specification, Version 0.71 is available for member review

2 months 3 weeks ago