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PCI Express PCIe PCI-SIG PCI Yanes PCI Special Interest Group PCIe 4.0 PCIe 3.0 OCuLink M-PHY M-PCIe PCI Express 3.0 PCI Express 4.0 Neshati M.2 SFF-8639 L1 sub states Half-swing IoT low-power Peripheral Component Interconnect PCIe Gen 4 IDF NVMe Internet of Things PCIe Special Interest Group PCI Express 2.0 PCIe 2.0 PCIe Gen3 L1 Sub-states PCIe 3.1 PCI Express 3.1 CEM Specification PCIe Generation 4 NGFF PCI Express Gen 4 low-swing Peripheral Component Interface PCI-SIG DevCon

PR Contact Info

  • PCI-SIG Public Relations
    Lori Mesecke & Meghan Zea
    Nereus for PCI-SIG
    pr@pcisig.com

News Releases

  • Synopsys Demonstrates Industry’s First PCI Express 5.0 IP Interoperability with Intel’s Future Xeon Scalable Processor
  • Astera Labs Announces Broad Availability of Aries Smart Retimers for PCIe® 4.0 and 5.0 Interconnects; Launches Cloud-Scale Interop Lab
  • Signal Quality Analyzer-R Series MP1900A Approved by PCI-SIG® as PCI Express® 4.0 Compliance Test Measuring Instrument
  • PLDA Achieves PCI Express® 4.0 Compliance for its XpressRICH™ PCIe® Controller IP During the First Official PCI-SIG® PCIe 4.0 Compliance Workshop
  • NETINT Technologies’ Codensity Solid State Drives First to Achieve Compliance with PCIe® 4.0 Technology
Read More...

In the News

  • Itigic (October 10, 2020) What is PCIe Lane Segmentation and Why It Has Different Lanes
  • eWEEKNews (August 24, 2020) Eight Reasons Why PCIe 4.0 is Important for Flash Storage
  • eWEEKNews (August 19, 2020) How PCIe Connectivity Is Enabling the Need for PC Speed
  • The Next Platform (August 6, 2020) Next Platform TV for August 6, 2020
  • Electronic Design (July 9, 2020) What’s the Difference Going from PCIe 3.0 to PCIe 6.0?
Read More...

Press Kits

  • PCI-SIG 2020 Annual Press Conference 
  • PCI-SIG APAC DevCon 2019 (zip file)
    • PCI-SIG APAC DevCon 2019 Press Briefing
    • PCI-SIG Granite River Labs PR
    • PCI-SIG Samtec PR
  • PCI-SIG DevCon 2019 (zip file)
    • PCI-SIG DevCon 2019 Press Briefing
    • PCIe 6.0 Specification PR
    • PCI-SIG Samtec PR
    • PCI-SIG Teledyne LeCroy PR
  • PCI-SIG DevCon 2018 (zip file)
    • PCI-SIG DevCon 2018 Briefing Presentation
    • PCI-SIG Diodes PR
    • PCI-SIG Teledyne LeCroy PR
    • PCIe 5.0 0.7 Blog
  • PCI-SIG DevCon 2017 (zip file)
    • Press Deck
    • PCIe 4.0, Rev. 0.9 Press Release
    • PCIe 5.0 Press Release
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    • PCI-SIG History Graphic

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Notes

"Every time you buy a notebook PC, you have to make a choice: low-cost integrated graphics, or expensive, discrete GPU? With the upcoming PCI Express OCuLink cable, you may not have to…[read more]"

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