This is already shaping up to be a busy year for PCI-SIG^® with the pending release of the PCI Express^® 5.0 specification targete

This is already shaping up to be a busy year for PCI-SIG^® with the pending release of the PCI Express^® 5.0 specification targete

I’m happy to share that 2018 has been another productive year for PCI-SIG. In addition to significant progress in our specification development and compliance work, we also continued to provide educational resources to our members and the industry.

Our PCI-SIG^® members have been hard at work. In 2017, we delivered PCI Express^® 4.0 with its 16 GT/s, while also diving headfirst into PCI Express 5.0 development – first announced at our annual PCI-SIG DevCon in June 2017.

PCI Express^® – also known as PCIe – used to get a bad rap for being power hungry on servers and PCs. But I’m happy to say that this is no longer the case. Are you aware that PCIe today is extremely power efficient with built-in low power features?

PCI Express^® – also known as PCIe – used to get a bad rap for being power hungry on servers and PCs. But I’m happy to say that this is no longer the case. Are you aware that PCIe today is extremely power efficient with built-in low power features?

I’m looking forward to attending the Flash Memory Summit (FMS) next week in Santa Clara.

Whew, what a week! That’s another PCI-SIG Developers Conference in the books though.

After successfully releasing PCIe^® 4.0 Specification Version 1.0 last October, the members of the PCI-SIG^® have been heads down and hard at work to ensure PCIe 5.0 specification is made a reality by 2019.

Press conference on June 5 to announce PCIe 5.0 spec updates