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For almost two decades, the PCI Express® (PCIe®) architecture has offered low latency and high bandwidth in support of next generation systems.
- Systems & Applications
- PCIe 6.0
- PCI Express 6.0
- PAM4
- PCIe FEC
- Forward Error Correction
- FLIT
PCI Express® (PCIe®) technology is the most important high-speed serial bus in servers. Due to its high bandwidth and low latency characteristics, PCI Express architecture is widely used in various server interconnect scenarios, such as:
- Signal Integrity
- PCIe 5.0
- PCI Express 5.0
- PCIe CEM
- PCIe Channel Loss
We are starting 2020 with the release of version 0.5 of the PCI Express® (PCIe®) 6.0 specification incorporating the significant member feedback received on version 0.3.
- Standards & Compliance
- PCIe 6.0
- PCI Express 6.0
- PAM4
- PCIe FEC
- Forward Error Correction
- FLIT
- PCI Express specification
PCI-SIG® has enabled PCI Express® (PCIe®) technology to be cost-effective and easy to implement by supporting multiple form factors for a variety of applications.
- Physical Form Factors
- PCIe 5.0
- PCI Express 5.0
- PCIe CEM
- PCIe Card Electromechanical Connector
At PCI-SIG, we take pride in ensuring that our specifications operate without a hitch. However, sometimes PCI Express developers need to submit Engineering Change Requests (ECRs) to update parts of the specification so that PCIe integrated products can reach their optimal functionality.
- Standards & Compliance
- PCIe Engineering Change Requests
- Firmware
- UEFI
- ACPI
Press conference on June 5 to announce PCIe 5.0 spec updates
- Standards & Compliance
- PCI Express 5.0
- PCI-SIG
- PCIe 5.0
- Developers Conference
- Specification