The storage landscape is rapidly evolving, led by advances in Artificial Intelligence (AI) and High-Performance Computing (HPC). These applications generate massive amounts of data that must be instantaneously processed, stored and analyzed in real time.

Introduction

For nearly three decades, PCI Express® (PCIe®) technology has served as the de facto high bandwidth, low latency interconnect. As the industry evolves to meet the needs of data-intensive applications, the PCIe specification has kept pace, enabling future innovation.

We are pleased to commence 2022 on a high note with the official release of the PCI Express® (PCIe®) 6.0 specification to members.

Infographic of the PCIe 6.0 Architecture

The CXL™ Consortium and PCI-SIG® are excited to announce a memorandum of understanding (MOU) between the two organizations.

By: Hope Bovenzi, Strategic Marketing, Astera Labs

One of the many new features included in the PCI Express^® (PCIe^®) specification will be PAM4 (Pulse Amplitude Modulation with 4 levels) signaling.

Earlier this month, I attended another eventful Flash Memory Summit (FMS) and I am pleased to say that PCI Express^® (PCIe^®) was around every corner at this year’s event.

This year’s Flash Memory Summit (FMS) is coming up on August 6. As PCI Express technologies continue to evolve and make strides in the industry, PCI-SIG^® is excited to highlight our participation in the growth of flash storage.