One of the many new features included in the PCI Express^® (PCIe^®) specification will be PAM4 (Pulse Amplitude Modulation with 4 levels) signaling.

At this year’s Open Compute Project Global Summit in San Jose on March 4 -5, attendees will have the opportunity to learn how PCI Express^® (PCIe^®) specifications enable OCP systems today and how newer versions of

The Internet of Things (IoT) Industry is rapidly growing in popularity and breadth of applications.

As I look back on 2019, I’m proud to report that it has been a banner year for PCI-SIG^®.

PCI-SIG^® has enabled PCI Express^® (PCIe^®) technology to be cost-effective and easy to implement by supporting multiple form factors for a variety of applications.

PCI Express^® (PCIe^®) technology is deployed worldwide by PCI-SIG member companies, so it only makes sense that PCI-SIG^® travels around the globe too.

Earlier this month, I attended another eventful Flash Memory Summit (FMS) and I am pleased to say that PCI Express^® (PCIe^®) was around every corner at this year’s event.

This year’s Flash Memory Summit (FMS) is coming up on August 6. As PCI Express technologies continue to evolve and make strides in the industry, PCI-SIG^® is excited to highlight our participation in the growth of flash storage.

The SD Association (SDA) recently announced SD Express, which adds the PCI Express^® and NVMe™ interfaces to the SD interface. The PCIe^® interface delivers transfer rates up to 985 megabytes per second (MB/s) and supports backward compatibility with existing SD hosts.

I am happy to share that PCI-SIG^® has begun developing the PCI Express^® (PCIe^®) 6.0 specification, targeted for release in 2021.