PCIe technology is set to be leveraged as an important component in the AI infrastructure marketplace.

The storage landscape is rapidly evolving, led by advances in Artificial Intelligence (AI) and High-Performance Computing (HPC). These applications generate massive amounts of data that must be instantaneously processed, stored and analyzed in real time.

There are many unique challenges in designing artificial intelligence (AI) and machine learning (ML) applications, and the exuberance around ChatGPT has highlighted the influence that AI can have on day-to-day life.

Servers are challenged to process more intricate and diverse types of workloads in cloud, hybrid-cloud and enterprise data centers.

Infographic of the PCIe Technology Forecast

Today at our PCI-SIG® Developers Conference 2023 in Santa Clara, California we debuted a new report from ABI Research, “PCI Express Market Vertical Opportunity.” We are proud to o

Infographic of the PCIe 6.0 Architecture

The upcoming PCIe® 6.0 specification introduces Flow Control Unit (FLIT) encoding, which enables the specification to provide low latency with high efficiency. FLIT mode is adopted for the PCIe 6.0 architecture because error correction needs to operate on fixed sized packets.

By: Hope Bovenzi, Strategic Marketing, Astera Labs

The PCI Express^® (PCIe^®) 6.0 specification will provide multiple features, including Transaction Layer Packet (TLP) payload, encoding and decoding, shared credit pooling, Forward Error Correction (FEC), CRC error correction, and more.