The SD Association (SDA) recently announced SD Express, which adds the PCI Express^® and NVMe™ interfaces to the SD interface. The PCIe^® interface delivers transfer rates up to 985 megabytes per second (MB/s) and supports backward compatibility with existing SD hosts.

I am happy to share that PCI-SIG^® has begun developing the PCI Express^® (PCIe^®) 6.0 specification, targeted for release in 2021.

I am happy to share that PCI-SIG^® has begun developing the PCI Express^® (PCIe^®) 6.0 specification, targeted for release in 2021.

PCI-SIG^® is proud to announce that we have established a working relationship with DMTF to simplify hardware management.

At PCI-SIG, we take pride in ensuring that our specifications operate without a hitch. However, sometimes PCI Express developers need to submit Engineering Change Requests (ECRs) to update parts of the specification so that PCIe integrated products can reach their optimal functionality.

I’m happy to share that 2018 has been another productive year for PCI-SIG. In addition to significant progress in our specification development and compliance work, we also continued to provide educational resources to our members and the industry.

PCI Express (PCIe^®) has been widely adopted in a number of applications that range from small, power-constrained IoT sensors and mobile devices to servers and networking and communications equipment.

PCI Express (PCIe^®) has been widely adopted in a number of applications that range from small, power-constrained IoT sensors and mobile devices to servers and networking and communications equipment.

I’m looking forward to attending the Flash Memory Summit (FMS) next week in Santa Clara.

I’m looking forward to attending the Flash Memory Summit (FMS) next week in Santa Clara.