OCP Summit 2019 Recap: How PCI Express® Specifications are Evolving to Meet HPC Needs

  • Posted on: 3 April 2019
  • By Richard Solomon, PCI-SIG® Vice President and Co-Chair Compliance Workgroup

his year, I was lucky enough to be able to attend and present at the Open Compute Project Summit and though it has come and gone by now, I’m already looking forward to the next one! 

The San Jose Convention Center was filled with an incredible group of almost 3,500 executives, engineers, develops and suppliers that are involved in the open hardware ecosystem and data center. I spent some time wandering through the exhibit hall and was thrilled to see that many PCI-SIG member companies had devices on display utilizing PCIe 4.0 (and even a few previewing PCIe 5.0) technology. The PCIe specification is truly the de-facto standard for high performance I/O and its proliferation in every aspect of the data center isn’t surprising.

I also had the opportunity to give two presentations about PCI Express technology. My first presentation was titled PCI Express Enabling Performance in HPC and I joined a panel for a second presentation titled OCP NIC 3.0 PCIe Electrical Compliance Test Fixture Update.

Here are a few key takeaways in case you couldn’t make the conference:

  • The PCI-SIG Compliance Program ushers products into the market faster. Member companies are invited to participate in the protocol, electrical and interoperability tests at PCI-SIG Compliance Workshops. Passing products are included on the Integrators List, which many companies refer to when making purchasing decisions about PCIe technology.
  • FYI testing for the PCIe 4.0 specification is available now with official Integrators List testing opening soon. PCIe 4.0 specification adoption is well underway, with the second official FYI test opportunity coming to PCI-SIG’s Compliance Workshop #109 on April 29-May 3 in Burlingame, California.
  • PCIe 5.0 specification will be released in early 2019. In under two years, the highly anticipated PCIe 5.0 specification—with a data rate reaching 32 GT/s—will be available to members. Beyond doubling bandwidth, PCIe 5.0 maintains full backwards compatibility with earlier specifications and includes electrical changes to improve signal integrity and mechanical performance of connectors.
  • PCIe delivers the bandwidth and performance required in OCP architectures. PCIe 4.0 and 5.0 offer high bandwidth, faster performance and the backwards compatibility necessary for high performance computing demands. PCI Express also offers enterprise-class data integrity in terms of extensive logging and error reporting mechanisms and features such as single-root IO virtualization (SR-IOV) in end-points, switches and root complexes. Review the OCP Wiki to see OCP use cases for PCIe technology.

To learn more about how PCIe technology enables OCP architectures and where the PCI Express specifications are heading, you can watch my first presentation on PCIe in HPC here and the second presentation about PCI-SIG Compliance testing here.