By Richard Solomon, PCI-SIG Vice President and Developers Conference Chair

Given the shift to virtual events this year, PCI-SIG® has adapted to a primarily digital world via various online initiatives like educational webinars, blogs and more. Continuing our virtual focus, we are excited to host the Fall Virtual Developers Conference 2020 to ensure the safety of our community of developers from 800+ member companies while allowing open access to our members, no matter their physical location.

Fall Virtual DevCon 2020 Schedule and Registration:

Registration is open for the Fall Virtual Developers Conference 2020. All employees of PCI-SIG member companies are welcome to register for this free event.

• October 12 – 23, 2020 – Sessions posted
• October 26, 2020 – Live Q&A Sessions
  
  • 5:00pm – 8:00pm Pacific Time / 8:00am – 11:00am Taiwan Standard Time / 9:00am – 12:00pm Japan Standard Time
• October 27, 2020 – Live Q&A Sessions
  
  • 5:00pm – 7:00pm Pacific Time / October 28 in APAC Region, 8:00am – 10:00am Taiwan Standard Time / 9:00am – 11:00am Japan Standard Time

Virtual Opportunities at Your Fingertips:

This online DevCon offers nearly every experience from in-person events, except for the handshakes and free pens. Fall Virtual DevCon 2020 provides PCI Express® (PCIe®) technology updates via various educational sessions and other interactive opportunities. The following activities are available for attendees to attend and view:

• Work Group Presentations

The PCIe Work Group presentations cover a variety of updates about PCIe architecture, new features in upcoming specifications, compliance requirements and more. The presentation topics are below:

• PCIe 6.0 Electrical Update    
• PCIe CEM Previews
• PCIe 6.0 PHY Logical 
• PCIe 6.0 Protocol Update      
• PCIe 4.0 Compliance: Protocol Deep Dive
• PCI Express Basics & Background
• PCI Express M.2 Updates
• PCIe Security Update

• Member Implementations Sessions

These sessions are presented by PCI-SIG members, sharing their experiences and unique tips and tricks learned during their implementation of PCIe technology. The session topics are as follows:

• Prototyping and Hardware Validation of PCIe 5.0 Designs at 32GT/s: Challenges and Solutions
• Linux Kernel Driver for PCIe DMA Integrated IP
• Whitebox Approach to Verify PCIe Link Training and Status State Machine
• PCIe Link Training Verification Insights & Challenges
• Use Case Driven Pre-silicon PCIe Performance Analysis
• PCIe 5.0 (32GT/s) Connector Compliance with Integrated Crosstalk Noise
• Development of a Highly Optimized PCI Express 4.0 Retimer Solution - A Case Study

• Q&A Sessions

PCI-SIG members are invited to participate in live Q&A sessions to engage with our speakers and receive in-depth answers to their technical questions. Be sure to call in during the Q&A sessions to connect with speakers you want to talk to. The schedule for Q&A sessions is below:

• October 26, 5:00pm – 8:00pm Pacific Time / October 27 in APAC Region, 8:00am – 11:00am Taiwan Standard Time / 9:00am – 12:00pm Japan Standard Time
  • Session 1: PCIe 6.0 PHY Logical and PCIe 6.0 Protocol Update      
  • Session 2: PCIe 4.0 Compliance: Protocol Deep Dive
  • Session 3: PCIe 6.0 Electrical Update, PCIe CEM Previews and PCI Express M.2 Updates
• October 27, 5:00pm – 7:00pm Pacific Time / October 28 in APAC Region, 8:00am – 10:00am Taiwan Standard Time / 9:00am – 11:00am Japan Standard Time
  • Session 1 (One hour):
    • Use Case Driven Pre-silicon PCIe Performance Analysis
    • Linux Kernel Driver for PCIe DMA Integrated IP
    • Whitebox Approach to Verify PCIe Link Training and Status State Machine
    • PCIe Link Training Verification Insights & Challenges
  • Session 2 (One hour):
    • Development of a Highly Optimized PCI Express 4.0 Retimer Solution - A Case Study
    • Prototyping and Hardware Validation of PCIe 5.0 Designs at 32GT/s: Challenges and Solutions
    • PCIe 5.0 (32GT/s) Connector Compliance with Integrated Crosstalk Noise

• PCI-SIG Virtual Booth

PCI-SIG invites attendees to “stop by” by our virtual booth to learn more about PCI-SIG activities. The booth provides links to important membership resources such as the PCI-SIG blog and webinar channel, information about the PCI-SIG Marketing Work Group (MWG) and the Virtual PCI Express Technology Showcase.

• Attend the Marketing Work Group Q&A to learn more about MWG activities and interact with MWG members:
  • October 27: 4:00pm – 5:00pm PT

• PCI Express Product Showcase

The PCI-SIG booth features a PCI Express Product Showcase including 35 products from 21 different PCI-SIG member companies. These products leverage the PCIe 4.0 and 5.0 specifications in various ways through networking solutions, PCIe IP, storage solutions, Retimers and test solutions.

• Virtual Sponsor Booths

The virtual sponsor booths highlight Adnacom, Anritsu, Avery Design Systems, Mobiveil, PLDA, Samtec and Synopsys. Attendees are encouraged to visit these booths to learn how these PCI-SIG member companies utilize PCIe architecture and are contributing to the expansion of the PCIe technology ecosystem.

I am looking forward to connecting with our members and will be practicing my virtual handshake and corny jokes. If you haven’t already done so, register for PCI-SIG Fall Virtual DevCon 2020 today.

To stay up-to-date on the latest DevCon news, follow us on Twitter and LinkedIn. Don’t forget to use the hashtag #PCISIGDevCon20 when sharing or searching for posts on Twitter and LinkedIn.