PCI-SIG® Developers Conference 2018 Recap: Focusing on PCI Express® Education

By Richard Solomon, PCI-SIG Vice President and Developers Conference Chair

Whew, what a week! That’s another PCI-SIG Developers Conference in the books though.

I was just in sunny Santa Clara (California of course) discussing all things PCI Express® technology with more than 560 PCI-SIG® members from around the world. Our members come together to learn from the PCIe® experts leading the spec development work as well as from companies that are implementing the technology now.

The conference included 4 tracks of presentations over two days, all given by engineers from PCI-SIG member companies, and covering all the hottest PCI Express topics—from the latest on PCIe 5.0 technology to an update on the M.2 form factor to lessons learned by early PCIe 4.0 adopters. An open panel discussion with the PCI-SIG work group chairs gave attendees the opportunity to get answers to their most pressing PCIe-related questions.

For the first time ever, all the presentations were video recorded. So yes, if you missed DevCon or just weren’t able to attend all the sessions you wanted to, you should very soon be able to watch the videos.  Having all these PCI Express experts onsite and with the video folks already here as well, the PCI-SIG kicked off a new educational video series, covering topics such as the PCIe technology ecosystem, low power features, and more. Yes, that’s me looking sooooo comfortable in front of the camera! Stay tuned for the videos to be posted shortly—and these should be available to everyone including non-PCI-SIG members.  

It’s awesome to see that PCI Express is continuing its dominance as the industry’s leading I/O technology and there is a lot to look forward to. We have seen rapid adoption of PCI Express 4.0 technology in 2018 alone, with numerous announcements from PCI-SIG member companies releasing PCIe 4.0-based products at DevCon.

During DevCon, the PCI-SIG also announced the publication of PCI Express 5.0, Version 0.7, with Version 0.9 releasing on its coattails later this year. We are targeting Q1 2019 for completion of the PCIe 5.0, Release 1.0 specification, further solidifying PCI-SIG’s track record of doubling I/O bandwidth every three years.

Finally, we continue to grow membership numbers (over 750 member companies strong!) and receive active support from companies across the supply chain. I want to send a special shout out to our great sponsors that helped make this event possible: thank you to our platinum sponsors Cadence, PLDA, Synopsys and Teledyne LeCroy and to our gold sponsors Anritsu, Avery, Keysight Technologies, Mentor Graphics and Tektronix.

Don’t worry if you missed the PCI-SIG Developers Conference; you can catch PCI-SIG at other events across the globe this year. In October, there will be additional DevCons in Israel and APAC and various PCI-SIG folks will be speaking at industry events including the Flash Memory Summit in August. More information about these events and how you can get involved will be coming in the next couple of months. If you’re not a member already, now is the time to join PCI-SIG to ensure you can attend future DevCons and learn from and engage with other PCIe developers and fans. You can find information on how to join the PCI-SIG here. Also, be sure to stay up to date on all the latest PCI-SIG developments by following us on Twitter, LinkedIn and YouTube.

Thank you again for making PCI-SIG Developers Conference 2018 a great event!

Richard