By Al Yanes, PCI-SIG President and Chairman

After successfully releasing PCIe® 4.0 Specification Version 1.0 last October, the members of the PCI-SIG® have been heads down and hard at work to ensure PCIe 5.0 specification is made a reality by 2019. We are happy to say that we are on track by announcing: PCI Express 5.0, Version 0.7 is now available for PCI-SIG members to review in the member workspace. I encourage all members to take a look.

Due to the strong effort of our members and workgroups – we will be able to continue our track record of doubling I/O bandwidth every three years. The PCIe 5.0 specification will deliver high-performance 32GT/s data rates and flexible lane configurations—all while prioritizing low power. Additional features include:

• Delivers higher signaling rates that enable narrower links to be used, supporting multiple applications in a variety of form factors
• Support for high-end networking solutions (i.e. 400Gb Ethernet and dual 200Gb/s InfiniBand solutions)
• Accelerator and GPU attachments for high-bandwidth solutions
• Continued use of L1 Sub-states to constrain power consumption during transmission idle periods

With the growing popularity of high bandwidth applications like artificial intelligence, machine learning, gaming, visual computing, storage and networking, doubling bandwidth is essential for helping developers continue to push technological boundaries and capabilities. The PCIe 5.0 specification will continue to set the standard for the I/O industry and the release of version 0.7 is a major step forward. More will be shared at the PCI-SIG DevCon, June 5-6, 2018 at the Santa Clara Convention Center. It’s open to all member companies and I hope to see you there. Onsite registration opens at 8am on June 5 in the Great America Lobby.

We have many exciting updates on the way, and if you’re not already a member, I invite you join PCI-SIG to view and to contribute to the PCIe 5.0 specification. You can access the membership application here. Members receive numerous benefits, including firsthand access to current and developing specifications, complimentary technical support, plus industry event inclusion. Most importantly, members will help shape the future of PCI Express architecture for the next 20 years and beyond.