Progress continues on the PCI Express® (PCIe®) 7.0 specification, which PCI-SIG® announced at US DevCon in June 2022. Thanks to the hard work of our technical work groups, we are pleased to announce that version 0.5 is now available for member review. This is the official first draft of the specification, incorporating all the feedback we received from members after the release of Version 0.3 in June 2023.

With this release, the PCIe 7.0 specification remains on track for full release in 2025. The PCIe 7.0 specification includes the following feature goals:

• Delivering 128 GT/s raw bit rate and up to 512 GB/s bi-directionally via x16 configuration
• Utilizing PAM4 (Pulse Amplitude Modulation with 4 levels) signaling
• Focusing on the channel parameters and reach
• Continuing to deliver low-latency and high-reliability targets
• Improving power efficiency
• Maintaining backwards compatibility with all previous generations of PCIe technology

PCIe 7.0 technology is aimed to be a scalable interconnect solution for data-intensive markets like 800G Ethernet, Artificial Intelligence/Machine Learning, Hyperscale Data Centers, HPC, Quantum Computing and the Cloud. As PCIe technology continues to evolve to meet the high bandwidth demands of these applications, the PCIe 7.0 architecture will focus on channel parameters and reach while improving power efficiency.

Contribute to PCI-SIG Specification Development

PCI-SIG members can access the PCIe 7.0 specification, version 0.5 on the members workspace on Causeway. If you are not yet a member, we invite you to become a member today.  

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