PCI-SIG Developers Conference Asia-Pacific 2022 Agenda

Agenda  Tokyo Day 1 
8:00 am – 9:00 am Registration
9:00 am – 10:30 am PCI Express Basics & Background (Richard Solomon) 
10:30 am – 11:00 am AM Break
11:00 am – 12:30 pm PCIe 6.0 Electrical Update (Mohiuddin Mazumder)
12:30 pm – 1:30 pm Lunch 
1:30 pm – 2:30 pm PCIe CEM Updates (Manisha Nilange)
2:30 pm – 3:30  pm PCIe 6.0 Protocol Update (Richard Solomon)
3:30 pm – 4:00 pm PM Break 
4:00 pm – 5:00 pm PCIe 6.0 PHY Logical (Richard Solomon) 
5:00 pm – 6:00 pm PCIe Compliance Updates (Manisha Nilange)

Agenda Seoul Day 1 
8:00 am – 9:00 am Registration
9:00 am – 10:30 am PCI Express Basics & Background (Richard Solomon)
10:30 am – 11:00 am AM Break
11:00 am – 12:30 pm PCIe 6.0 Electrical Update (Mohiuddin Mazumder)
12:30 pm – 1:30 pm Lunch 
1:30 pm – 2:30 pm PCIe CEM Updates (Manisha Nilange)
2:30 pm – 3:30 pm PCIe 6.0 Protocol Update (Richard Solomon) 
3:30 pm – 4:00 pm PM Break
4:00 pm – 5:00 pm PCIe 6.0 PHY Logical (Richard Solomon) 
5:00 pm – 6:00 pm PCIe Compliance Updates (Manisha Nilange)

 

SPEAKERS      

Manisha Nilange

Manisha Nilange is an I/O Architect, focusing on electrical compliance and enabling. She led development of PCIe 2.0 and 3.0 compliance test fixtures and subsequent industry enabling. Manisha has been with Intel Corporation since receiving her MS in Electrical Engineering from the University of Texas, Arlington.

Mohiuddin Mazumder

Dr. Mohiuddin Mazumder is a Principal Engineer in the Data Center Group at Intel. He has 23 years of industry experience in high speed signaling and has been a leading contributor in the development of the PCIe 4.0 and 5.0 Electrical Specifications. Mohiuddin Co-Chairs the PCI-SIG Electrical WG and has been leading the PCI-SIG electrical pathfinding to enable the 6th generation of backward-compatible PCIe while doubling bandwidth.

Richard Solomon

Richard Solomon is the Technical Marketing Manager for Synopsys' DesignWare PCI Express Controller IP.  He has been involved in the development of PCI chips dating back to pre-1.0 versions of the PCI spec. Richard constructed and led the development of the PCI Express and PCI-X interface cores used in an industry-leading line of storage RAID controller chips. He has served on the PCI-SIG Board of Directors for over 10 years, and continues to represent Synopsys on a wide variety of PCI workgroups. Richard holds a BSEE from Rice University and 27 US Patents, many of which relate to PCI technology.