Integrators List
Another valuable benefit of the Compliance Program is inclusion on the PCI-SIG Integrators List. This list includes all products that have successfully completed the rigorous testing procedures of the Compliance Workshop. Inclusion on the list is only available to PCI-SIG member companies and cannot be used for individual marketing programs. However, many companies do refer to the list when making company-to-company purchases.
Users may filter their search by generation, product type, and revision. Select the appropriate filters and then select the Filter button to initiate your search.
Disclaimer: PCI-SIG disclaims all warranties and liabilities for the use of any product listed in this document and assumes no responsibility for any errors that appear in this document nor for compliance testing performed for any of the listed products.
PCI Express 5.0
| Company | Product Name | Identifier | Spec Revision | Max Lane Width Tested | Function | Date Added |
|---|---|---|---|---|---|---|
| Cadence Design Systems, Inc. | Cadence PCIe Gen6 Controller and Gen6 PHY IP | Cadence PCIe Gen6 Controller & 64GT/s Excelsior TSMC T5G PHY IP | PCIe 5.0 at 32GT/s | x8 | Cadence IP Demo Platform for PCIe Gen6 Endpoint controller IP & Gen6 PHY IP | Oct 03, 2023 |
| Cadence Design Systems, Inc. | Cadence PCIe Gen6 Controller and Gen6 PHY IP | Cadence PCIe Gen6 Controller & 64GT/s Niagara TSMC N3 PHY IP | PCIe 5.0 at 32GT/s | x8 | Cadence IP Demo Platform for PCIe Gen6 Endpoint controller IP & Gen6 PHY IP | May 01, 2024 |
| Cadence Design Systems, Inc. | Cadence PCIe Gen6 Controller and Gen6 PHY IP | Cadence PCIe Gen6 Controller & 64GT/s Excelsior TSMC T5G PHY IP | PCIe 5.0 at 32GT/s | x1 | Cadence IP Demo Platform for PCIe Gen6 Endpoint controller IP & Gen6 PHY IP | Dec 10, 2022 |
| Cadence Design Systems, Inc. | Cadence PCIe Gen6 Controller and Gen6 PHY IP | Cadence PCIe Gen6 Controller & 64GT/s Excelsior SS5LPe PHY IP | PCIe 5.0 at 32GT/s | x8 | Cadence IP Demo Platform for PCIe Gen6 Endpoint controller IP & Gen6 PHY IP | Oct 03, 2023 |
| Cadence Design Systems, Inc. | Cadence PCIe Gen6 Controller and Gen6 PHY IP | Cadence PCIe Gen5 Controller & 32GT/s Whistler TSMC 3nm PHY IP | PCIe 5.0 at 32GT/s | x8 | Cadence IP Demo Platform for PCIe Gen5 Endpoint controller IP & Gen5 PHY IP | May 01, 2024 |
| Company | Product Name | Identifier | Spec Revision | Max Lane Width Tested | Function | Date Added |
|---|---|---|---|---|---|---|
| Cadence Design Systems, Inc. | Cadence PCIe Gen6 Controller and Gen6 PHY IP | Cadence PCIe Gen6 Controller & 64GT/s Excelsior SS5LPe PHY IP | PCIe 5.0 at 32GT/s | x8 | Cadence IP Demo Platform for PCIe Gen6 Endpoint controller IP & Gen6 PHY IP | Oct 03, 2023 |
| Cadence Design Systems, Inc. | Cadence PCIe Gen6 Controller and Gen6 PHY IP | Cadence PCIe Gen5 Controller & 32GT/s Whistler TSMC 3nm PHY IP | PCIe 5.0 at 32GT/s | x8 | Cadence IP Demo Platform for PCIe Gen5 Endpoint controller IP & Gen5 PHY IP | May 01, 2024 |
| Cadence Design Systems, Inc. | Cadence PCIe Gen6 Controller and Gen6 PHY IP | Cadence PCIe Gen6 Controller & 64GT/s Excelsior TSMC T5G PHY IP | PCIe 5.0 at 32GT/s | x8 | Cadence IP Demo Platform for PCIe Gen6 Endpoint controller IP & Gen6 PHY IP | Oct 03, 2023 |
| Cadence Design Systems, Inc. | Cadence PCIe Gen6 Controller and Gen6 PHY IP | Cadence PCIe Gen6 Controller & 64GT/s Niagara TSMC N3 PHY IP | PCIe 5.0 at 32GT/s | x8 | Cadence IP Demo Platform for PCIe Gen6 Endpoint controller IP & Gen6 PHY IP | May 01, 2024 |
| Company | Product Name | Identifier | Spec Revision | Max Lane Width Tested | Function | Date Added |
|---|---|---|---|---|---|---|
| Cadence Design Systems, Inc. | Cadence PCIe RP Gen6 Controller and Gen6 PHY IP | Cadence PCIe Gen6 Controller & 64GT/s Excelsior TSMC T5G PHY IP | PCIe 5.0 at 32GT/s | x8 | Cadence IP Demo Platform for PCIe Gen6 Root Complex controller IP & Gen6 PHY IP | Feb 29, 2024 |
| Cadence Design Systems, Inc. | Cadence PCIe RP Gen6 Controller and Gen6 PHY IP | Cadence PCIe Gen6 Controller & 64GT/s Excelsior SS5LPe PHY IP | PCIe 5.0 at 32GT/s | x8 | Cadence IP Demo Platform for PCIe Gen6 Root Complex controller IP & Gen6 PHY IP | Feb 29, 2024 |
| Company | Product Name | Identifier | Spec Revision | Max Lane Width Tested | Function | Date Added |
|---|---|---|---|---|---|---|
| Cadence Design Systems, Inc. | Cadence PCIe RP Gen6 Controller and Gen6 PHY IP | Cadence PCIe Gen6 Controller & 64GT/s Excelsior TSMC T5G PHY IP | PCIe 5.0 at 32GT/s | x8 | Cadence IP Demo Platform for PCIe Gen6 Root Complex controller IP & Gen6 PHY IP | Feb 29, 2024 |
| Cadence Design Systems, Inc. | Cadence PCIe RP Gen6 Controller and Gen6 PHY IP | Cadence PCIe Gen6 Controller & 64GT/s Excelsior SS5LPe PHY IP | PCIe 5.0 at 32GT/s | x8 | Cadence IP Demo Platform for PCIe Gen6 Root Complex controller IP & Gen6 PHY IP | Feb 29, 2024 |