PCI-SIG specifications define standards driving the industry-wide compatibility of peripheral component interconnects. Members regularly review them, providing commentary and change requests when necessary. These requests are considered by technical workgroups and applied as appropriate, resulting in collaboratively devised specifications benefiting millions of platforms and add-in devices.
Engineering Change Request Process
PCI-SIG members may submit requests to change specifications here. The Engineering Change Request process and form can be found here.
Purchasing Specifications
PCI-SIG members may access specifications online, at no cost, using the Specification Library. Members may filter their search by technology type, revision, and the type of document. Select the appropriate filters and then select the Filter button to initiate your search. Alternatively, members may purchase a hard copy of the specifications, at a reduced member rate, here.
Non-members who are interested in purchasing specifications may submit their order here.
PCI Code & ID Assignment Specifications
The PCI Code & ID Assignment Specifications are accessible to non-members without charge here. PCI-SIG members can download these specifications directly from the Specifications Library below.
This document describes the hardware independent fir...view moreThis document describes the hardware independent firmware interface for managing PCI, PCI-X, and PCI Express™ systems in a host computer.
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This document contains the formal specifications of ...view moreThis document contains the formal specifications of the protocol, electrical, and mechanical features of the PCI Local Bus Specification, Revision 3.0, as the production version effective February 3, 2004. The PCI Local Bus Specification, Revision 2.3, issued March 29, 2002, is not superseded by this specification.
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This document describes the hardware independent fir...view moreThis document describes the hardware independent firmware interface for managing PCI, PCI-X, and PCI Express™ systems in a host computer.
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This is a modification of the cable assembly memory ...view moreThis is a modification of the cable assembly memory map defined in the OCuLink Memory Map ECN. Some bits contained within the external cable assembly's memory are modified to allow for cable aggregation.
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This specification defines an implementation for sma...view moreThis specification defines an implementation for small form factor PCI Express cards. The specification uses a qualified subset of the same signal protocol, electrical definitions, and configuration definitions as the PCI Express Base Specification, Revision 2.0. Where this specification 5 does not explicitly define PCI Express characteristics, the PCI Express Base Specification governs.
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Similar to, and based on, the Resizable BAR and Expa...view moreSimilar to, and based on, the Resizable BAR and Expanded Resizable BAR ECNs, this optional ECN adds a capability for PFs to be able to resize their VF BARs. This ECN is written with the expectation that the Expanded Resizable BAR ECN will have been released prior to this ECN’s release. This ECN supports all of the BAR sizes defined by both the Resizable BAR and Expanded Resizable BAR ECNs.
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The Resizable BAR capability currently allows BARs o...view moreThe Resizable BAR capability currently allows BARs of up to 512 GB (239), which allows address bits <38:0> to be passed into an Endpoint. This proposal extends resizable BARs to up to 263 bits, which supports the entire address space.
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This specification describes the PCI Express® archit...view moreThis specification describes the PCI Express® architecture, interconnect attributes, fabric management, and the programming interface required to design and build systems and peripherals that are compliant with the PCI Express Specification.
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This document primarily covers PCI Express testing o...view moreThis document primarily covers PCI Express testing of root complexes, switches, bridges, and endpoints for the standard configuration mechanisms, registers, and features in Chapter 7 of the PCI Express Base Specification, Revision 2.0. This specification does not describe the full set of PCI Express tests and assertions for these devices.
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This is a companion specification to the PCI Express...view moreThis is a companion specification to the PCI Express Base Specification. Its primary focus is the implementation of cabled PCI Express®. The discussions are confined to copper cabling and their connector requirements to meet the PCI Express signaling needs at 5.0 GT/s. No assumptions are made regarding the implementation of PCI Express compliant Subsystems on either side of the cabled Link; e.g., PCI Express Card Electromechanical (CEM), ExpressCard5 ™, ExpressModule™, PXI Express™, system board, or any other form factor. Such form factors are covered in other separate specifications.
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This specification defines an implementation for sma...view moreThis specification defines an implementation for small form factor PCI Express cards. The specification uses a qualified sub-set of the same signal protocol, electrical definitions, and configuration definitions as the PCI Express Base Specification, Revision 2.0. Where this specification does not explicitly define PCI Express characteristics, the PCI Express Base Specification governs.
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This specification describes the PCI Express® archit...view moreThis specification describes the PCI Express® architecture, interconnect attributes, fabric management, and the programming interface required to design and build systems and peripherals that are compliant with the PCI Express Specification.
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This specification describes the PCI Express® archit...view moreThis specification describes the PCI Express® architecture, interconnect attributes, fabric management, and the programming interface required to design and build systems and peripherals that are compliant with the PCI Express Specification.
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This optional ECN adds a capability for Functions wi...view moreThis optional ECN adds a capability for Functions with BARs to report various options for sizes of their memory mapped resources that will operate properly. Also added is an ability for software to program the size to configure the BAR to.
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This specification is a companion for the PCI Expres...view moreThis specification is a companion for the PCI Express Base Specification, Revision 2.0. Its primary focus is the implementation of an evolutionary strategy with the current PCI™ desktop/server mechanical and electrical specifications. The discussions are confined to ATX or ATX-based form factors. Other form factors, such as PCI Express® Mini Card are covered in other separate specifications.
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This document describes the hardware independent fir...view moreThis document describes the hardware independent firmware interface for managing PCI, PCI-X, and PCI Express™ systems in a host computer.
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