Integrators List
Another valuable benefit of the Compliance Program is inclusion on the PCI-SIG Integrators List. This list includes all products that have successfully completed the rigorous testing procedures of the Compliance Workshop. Inclusion on the list is only available to PCI-SIG member companies and cannot be used for individual marketing programs. However, many companies do refer to the list when making company-to-company purchases.
Users may filter their search by generation, product type, and revision. Select the appropriate filters and then select the Filter button to initiate your search.
Disclaimer: PCI-SIG disclaims all warranties and liabilities for the use of any product listed in this document and assumes no responsibility for any errors that appear in this document nor for compliance testing performed for any of the listed products.
PCI Express 3.0
| Company | Product Name | Identifier | Spec Revision | Max Lane Width Tested | Function | Date Added |
|---|---|---|---|---|---|---|
| Cadence Design Systems | Cadence PCIe 3.0 Controller IP & 8GT/s PHY IP | Cadence Interface IP and Gen3 Speed Salvo+ 28HPC+ PHY IP | PCIe 3.0 at 8GT/s | x1 | Cadence Demo Platform for Endpoint Controller IP & PHY IP | Jul 10, 2017 |
| Cadence Design Systems | Cadence PCIe 3.0 Controller IP & Gen3 speed PHY IP | Cadence Interface IP and Gen 3 Speed Salvo (16FF+) PHY IP | PCIe 3.0 at 8GT/s | x1 | Cadence Endpoint Controller IP & PHY IP | Jan 18, 2015 |
| Cadence Design Systems | Cadence PCIe 3.0 Controller IP & Gen3 PHY IP | Cadence Interface IP and Gen3 UPHY2 (16FF+) PHY IP | PCIe 3.0 at 5GT/s | x1 | Cadence Endpoint Controller IP & PHY IP | Oct 07, 2015 |
| Cadence Design Systems | Cadence PCIe 3.0 Controller IP & Gen3 Speed PHY IP | Cadence Interface IP and Gen 3 Speed SalvoLR PHY IP | PCIe 3.0 at 8GT/s | x1 | Cadence Endpoint Controller IP & PHY IP | Jun 05, 2015 |
| Cadence Design Systems | Cadence PCIe 3.0 Controller IP & 8GT/s PHY IP | Cadence Interface IP and 8 GT/s Salvo16FF(WB) PHY IP | PCIe 3.0 at 8GT/s | x1 | Cadence Endpoint Controller IP & PHY IP | May 19, 2016 |
| Cadence Design Systems | Cadence PCIe 3.0 Controller IP & Gen3 PHY IP | Cadence Interface IP and Gen3 SalvoPlus PHY IP | PCIe 3.0 at 8GT/s | x1 | Cadence Endpoint Controller IP & PHY IP | Oct 07, 2015 |
| Cadence Design Systems | Cadence PCIe 2.0 Controller IP & 5GT/s PHY IP | Cadence Interface IP and Gen2 Speed Megha 28HPC PHY IP | PCIe 3.0 at 5GT/s | x1 | Cadence Demo Platform for Endpoint Controller IP & PHY IP | Jul 10, 2017 |
| Cadence Design Systems India Pvt. Ltd. | Cadence PCIe Controller and PHY IP1 | Cadence PCIe 3.0 Controller IP & 8GT/s Salvo UMC28HPC PCIe PHY IP | PCIe 3.0 at 8GT/s | x1 | Cadence IP Demo Platform for PCIe Endpoint Controller IP & PHY IP | May 16, 2019 |
| Cadence Design Systems | Cadence PCIe 3.0 Controller IP & Gen3 PHY IP | Cadence Interface IPs and Gen3 PHY IP | PCIe 3.0 at 8GT/s | x1 | Cadence Endpoint Controller IP & PHY IP | Apr 29, 2014 |
| Cadence Design Systems | Cadence PCIe 3.0 Controller IP & 8GT/s PHY IP | Cadence Interface IP and 8 GT/sSierra2 PHY IP | PCIe 3.0 at 8GT/s | x1 | Cadence Endpoint Controller IP & PHY IP | May 19, 2016 |
| Cadence Design Systems | Cadence PCIe 3.0 Controller IP | Cadence Interface IPs | PCIe 3.0 at 8GT/s | x1 | Cadence Endpoint Controller IP | Jan 27, 2014 |
| Cadence Design Systems | Cadence PCIe 2.0 Controller IP & 5GT/s PHY IP | Cadence Interface IP and Gen2 Speed Megha 28HPC PHY IP | PCIe 3.0 at 5GT/s | x1 | Cadence Demo Platform for Endpoint Controller IP & PHY IP | Jun 29, 2017 |
| Cadence Design Systems (India) Private Limited | Cadence PCIe 3.0 Controller IP & 8GT/s PCIe PHY IP | Cadence PCIe 3.0 Controller IP & 8GT/s Torrent 7nm PCIe PHY IP | PCIe 3.0 at 8GT/s | x1 | Cadence IP Demo Platform for PCIe Endpoint Controller IP & PHY IP | Nov 19, 2018 |
| Cadence Design Systems | Cadence PCIe 3.0 Controller IP & 5 GT/s PHY IP | Cadence Interface IP and Gen3 5GT/s UPHY (16FF+) PHY IP | PCIe 3.0 at 5GT/s | x1 | Cadence Endpoint Controller IP & PHY IP | Jan 18, 2015 |
| Company | Product Name | Identifier | Spec Revision | Max Lane Width Tested | Function | Date Added |
|---|---|---|---|---|---|---|
| Cadence Design Systems | Cadence PCIe 3.0 Controller IP | Cadence Interface IPs | PCIe 3.0 at 8GT/s | x1 | Cadence Demo Platform for Endpoint Controller IP | Jan 27, 2014 |
| Cadence Design Systems | Cadence PCIe 3.0 Controller IP & 8GT/s PHY IP | Cadence Interface IP and 8GT/s Sierra2 PHY IP | PCIe 3.0 at 8GT/s | x1 | Cadence Demo Platform for Endpoint Controller IP & PHY IP | May 19, 2016 |
| Cadence Design Systems (India) Private Limited | Cadence PCIe 3.0 Controller IP & 8GT/s Torrent T16FFC PCIe PHY IP | PCIe 3.0 at 8GT/s | x1 | End Point with Memory controller class code. | May 23, 2018 | |
| Cadence Design Systems (India) Private Limited | Cadence PCIe 3.0 Controller IP & 8GT/s PCIe PHY IP | Cadence PCIe 3.0 Controller IP & 8GT/s Torrent 7nm PCIe PHY IP | PCIe 3.0 at 8GT/s | x1 | Cadence IP Demo Platform for PCIe Endpoint Controller IP & PHY IP | Nov 19, 2018 |
| Cadence Design Systems | Cadence PCIe 3.0 Controller IP & 8GT/s PHY IP | Cadence Interface IP and Gen3 Speed Salvo+ 28HPC+ PHY IP | PCIe 3.0 at 8GT/s | x1 | Cadence Demo Platform for Endpoint Controller IP & PHY IP | Jul 10, 2017 |
| Cadence Design Systems (India) Private Limited | Cadence PCIe 3.0 Controller IP & 8GT/s Torrent TSMC 12FFC PCIe PHY IP | Cadence PCIe 3.0 Controller IP & 8GT/s Torrent TSMC 12FFC PCIe PHY IP | PCIe 3.0 at 8GT/s | x1 | End Point with Memory controller class code | Aug 12, 2018 |
| Cadence Design Systems | Cadence PCIe 3.0 Controller IP & Gen3 Speed Sierra T16FFC PHY IP | PCIe 3.0 at 8GT/s | x1 | Aug 23, 2017 | ||
| Cadence Design Systems | Cadence PCIe 3.0 Controller IP & 5 GT/s PHY IP | Cadence Interface IP and Gen3 5GT/s UPHY (16FF+) PHY IP | PCIe 3.0 at 5GT/s | x1 | Cadence Demo Platform for Endpoint Controller IP & PHY IP | Jan 18, 2015 |
| Cadence Design Systems | Cadence PCIe 3.0 Controller IP & Gen 3 speed PHY IP | Cadence Interface IP and Gen 3 Speed Salvo (16FF+) PHY IP | PCIe 3.0 at 8GT/s | x1 | Cadence Demo Platform for Endpoint Controller IP & PHY IP | Jan 18, 2015 |
| Cadence Design Systems | Cadence PCIe 3.0 Controller IP & Gen3 Speed PHY IP | Cadence Interface IP and Gen3 Speed SalvoLR PHY IP | PCIe 3.0 at 8GT/s | x1 | Cadence Demo Platform for E ndpoint Controller IP & PHY IP | May 06, 2015 |
| Cadence Design Systems | Cadence PCIe 2.0 Controller IP & 5GT/s PHY IP | Cadence Interface IP and Gen2 Speed Megha 28HPC PHY IP | PCIe 3.0 at 5GT/s | x1 | Cadence Demo Platform for Endpoint Controller IP & PHY IP | Jul 10, 2017 |
| Cadence Design Systems | Cadence PCIe 2.0 Controller IP & 5GT/s PHY IP | Cadence Interface IP and Gen2 Speed Megha 28HPC PHY IP | PCIe 3.0 at 5GT/s | x1 | Cadence Demo Platform for Endpoint Controller IP & PHY IP | Jun 29, 2017 |
| Cadence Design Systems India Pvt. Ltd. | Cadence PCIe Controller and PHY IP1 | Cadence PCIe 3.0 Controller IP & 8GT/s Salvo UMC28HPC PCIe PHY IP | PCIe 3.0 at 8GT/s | x1 | Cadence IP Demo Platform for PCIe Endpoint Controller IP & PHY IP | May 16, 2019 |
| Cadence Design Systems | Cadence PCIe 3.0 Controller IP & Gen2 Speed PHY IP | Cadence Interface IP and Gen3 UPHY2 (16FF+) PHY IP | PCIe 3.0 at 5GT/s | x1 | Cadence Demo Platform for Endpoint Controller IP & PHY IP | Oct 07, 2015 |
| Cadence Design Systems (India) Private Limited | Cadence PCIe 3.0 Controller IP & 8GT/s Salvo UMC 28HPC PCIe PHY IP | PCIe 3.0 at 8GT/s | x1 | Dec 19, 2017 | ||
| Cadence Design Systems | Cadence PCIe 3.0 Controller IP & Gen 3 PHY IP | Cadence Interface IPs and Gen3 PHY IP | PCIe 3.0 at 8GT/s | x1 | Cadence Demo Platform for Endpoint Controller IP & PHY IP | Apr 29, 2014 |
| Cadence Design Systems | Cadence PCIe 3.0 Controller IP & 8GT/s PHY IP | Cadence Interface IP and 8GT/s Salvo 16FF (WB) PHY IP | PCIe 3.0 at 8GT/s | x1 | Cadence Demo Platform for Endpoint Controller IP & PHY IP | May 19, 2016 |
| Cadence Design Systems (India) Private Limited | Cadence PCIe 3.0 Controller IP & 8GT/s Sierra SS10LPP PCIe PHY IP | PCIe 3.0 at 8GT/s | x1 | End Point with Memory controller class code. | May 23, 2018 | |
| Cadence Design Systems | Cadence PCIe 3.0 Controller IP & Gen3 Speed PHY IP | Cadence Interface IP and Gen3 SalvoPlus PHY IP | PCIe 3.0 at 8GT/s | x1 | Cadence Demo Platform for Endpoint Controller IP & PHY IP | Oct 07, 2015 |
PCI Express 5.0
| Company | Product Name | Identifier | Spec Revision | Max Lane Width Tested | Function | Date Added |
|---|---|---|---|---|---|---|
| Cadence Design Systems, Inc. | Cadence PCIe RP Gen6 Controller and Gen6 PHY IP | Cadence PCIe Gen6 Controller & 64GT/s Excelsior SS5LPe PHY IP | PCIe 5.0 at 32GT/s | x8 | Cadence IP Demo Platform for PCIe Gen6 Root Complex controller IP & Gen6 PHY IP | Feb 29, 2024 |
| Cadence Design Systems, Inc | Cadence PCIe RP Gen5 Controller and Gen5 PHY IP | Cadence PCIe Gen5 Controller & 32GT/s Whistler TSMC T5G PHY IP | PCIe 5.0 at 32GT/s | x8 | Cadence IP Demo Platform for PCIe Gen5 Root Complex controller IP | Jul 31, 2022 |
| Cadence Design Systems, Inc. | Cadence PCIe RP Gen6 Controller and Gen6 PHY IP | Cadence PCIe Gen6 Controller & 64GT/s Excelsior TSMC T5G PHY IP | PCIe 5.0 at 32GT/s | x8 | Cadence IP Demo Platform for PCIe Gen6 Root Complex controller IP & Gen6 PHY IP | Feb 29, 2024 |
| Cadence Design Systems, Inc | Cadence PCIe RP Gen5 Controller and Gen5 PHY IP | Cadence PCIe Gen5 Controller & 32GT/s Whistler TSMC T7G PHY IP | PCIe 5.0 at 32GT/s | x8 | Cadence IP Demo Platform for PCIe Gen5 Root Complex controller IP & Gen5 PHY IP | Jul 31, 2022 |
| Cadence Design Systems, Inc. | Cadence PCIe RP Gen5 Controller and Gen5 PHY IP | Cadence PCIe Gen5 Controller & 32GT/s Whistler TSMC T6G PHY IP | PCIe 5.0 at 32GT/s | x8 | Cadence IP Demo Platform for PCIe Gen5 Root Complex controller IP & Gen5 PHY IP | Oct 02, 2022 |
| Company | Product Name | Identifier | Spec Revision | Max Lane Width Tested | Function | Date Added |
|---|---|---|---|---|---|---|
| Cadence Design Systems, Inc. | Cadence PCIe Gen5 Controller and Gen5 PHY IP | Cadence PCIe Gen5 Controller & 32GT/s Whistler TSMC T6G PHY IP | PCIe 5.0 at 32GT/s | x8 | Cadence IP Demo Platform for PCIe Gen5 Endpoint controller IP & Gen5 PHY IP | May 03, 2022 |
| Cadence Design Systems, Inc. | Cadence PCIe Gen6 Controller and Gen6 PHY IP | Cadence PCIe Gen6 Controller & 64GT/s Excelsior SS5LPe PHY IP | PCIe 5.0 at 32GT/s | x8 | Cadence IP Demo Platform for PCIe Gen6 Endpoint controller IP & Gen6 PHY IP | Oct 03, 2023 |
| Cadence Design Systems, Inc. | Cadence PCIe Gen5 Controller and Gen5 PHY IP | Cadence PCIe Gen5 Controller & 32GT/s Whistler TSMC T7G PHY IP | PCIe 5.0 at 32GT/s | x8 | Cadence IP Demo Platform for PCIe Gen5 Endpoint controller IP & Gen5 PHY IP | May 03, 2022 |
| Cadence Design Systems, Inc. | Cadence PCIe Gen6 Controller and Gen6 PHY IP | Cadence PCIe Gen6 Controller & 64GT/s Excelsior TSMC T5G PHY IP | PCIe 5.0 at 32GT/s | x1 | Cadence IP Demo Platform for PCIe Gen6 Endpoint controller IP & Gen6 PHY IP | Dec 10, 2022 |
| Cadence Design Systems, Inc. | Cadence PCIe Gen6 Controller and Gen6 PHY IP | Cadence PCIe Gen6 Controller & 64GT/s Excelsior TSMC T5G PHY IP | PCIe 5.0 at 32GT/s | x8 | Cadence IP Demo Platform for PCIe Gen6 Endpoint controller IP & Gen6 PHY IP | Oct 03, 2023 |
| Cadence Design Systems, Inc. | Cadence PCIe Gen5 Controller and Gen5 PHY IP | Cadence PCIe Gen5 Controller & 32GT/s Whistler TSMC T5G PHY IP | PCIe 5.0 at 32GT/s | x8 | Cadence IP Demo Platform for PCIe Gen5 Endpoint controller IP & Gen5 PHY IP | May 03, 2022 |
| Company | Product Name | Identifier | Spec Revision | Max Lane Width Tested | Function | Date Added |
|---|---|---|---|---|---|---|
| Cadence Design Systems, Inc. | Cadence PCIe Gen6 Controller and Gen6 PHY IP | Cadence PCIe Gen6 Controller & 64GT/s Excelsior TSMC T5G PHY IP | PCIe 5.0 at 32GT/s | x8 | Cadence IP Demo Platform for PCIe Gen6 Endpoint controller IP & Gen6 PHY IP | Oct 03, 2023 |
| Cadence Design Systems, Inc. | Cadence PCIe Gen5 Controller and Gen5 PHY IP | Cadence PCIe Gen5 Controller & 32GT/s Whistler TSMC T7G PHY IP | PCIe 5.0 at 32GT/s | x8 | Cadence IP Demo Platform for PCIe Gen5 Endpoint controller IP & Gen5 PHY IP | May 03, 2022 |
| Cadence Design Systems, Inc. | Cadence PCIe Gen5 Controller and Gen5 PHY IP | Cadence PCIe Gen5 Controller & 32GT/s Whistler TSMC T5G PHY IP | PCIe 5.0 at 32GT/s | x8 | Cadence IP Demo Platform for PCIe Gen5 Endpoint controller IP & Gen5 PHY IP | May 03, 2022 |
| Cadence Design Systems, Inc. | Cadence PCIe Gen5 Controller and Gen5 PHY IP | Cadence PCIe Gen5 Controller & 32GT/s Whistler TSMC T6G PHY IP | PCIe 5.0 at 32GT/s | x8 | Cadence IP Demo Platform for PCIe Gen5 Endpoint controller IP & Gen5 PHY IP | May 03, 2022 |
| Cadence Design Systems, Inc. | Cadence PCIe Gen6 Controller and Gen6 PHY IP | Cadence PCIe Gen6 Controller & 64GT/s Excelsior SS5LPe PHY IP | PCIe 5.0 at 32GT/s | x8 | Cadence IP Demo Platform for PCIe Gen6 Endpoint controller IP & Gen6 PHY IP | Oct 03, 2023 |
| Company | Product Name | Identifier | Spec Revision | Max Lane Width Tested | Function | Date Added |
|---|---|---|---|---|---|---|
| Cadence Design Systems, Inc. | Cadence PCIe RP Gen6 Controller and Gen6 PHY IP | Cadence PCIe Gen6 Controller & 64GT/s Excelsior TSMC T5G PHY IP | PCIe 5.0 at 32GT/s | x8 | Cadence IP Demo Platform for PCIe Gen6 Root Complex controller IP & Gen6 PHY IP | Feb 29, 2024 |
| Cadence Design Systems, Inc | Cadence PCIe RP Gen5 Controller and Gen5 PHY IP | Cadence PCIe Gen5 Controller & 32GT/s Whistler TSMC T7G PHY IP | PCIe 5.0 at 32GT/s | x8 | Cadence IP Demo Platform for PCIe Gen5 Root Complex controller IP & Gen5 PHY IP | Jul 31, 2022 |
| Cadence Design Systems, Inc | Cadence PCIe RP Gen5 Controller and Gen5 PHY IP | Cadence PCIe Gen5 Controller & 32GT/s Whistler TSMC T5G PHY IP | PCIe 5.0 at 32GT/s | x8 | Cadence IP Demo Platform for PCIe Gen5 Root Complex controller IP | Jul 31, 2022 |
| Cadence Design Systems, Inc. | Cadence PCIe RP Gen5 Controller and Gen5 PHY IP | Cadence PCIe Gen5 Controller & 32GT/s Whistler TSMC T6G PHY IP | PCIe 5.0 at 32GT/s | x8 | Cadence IP Demo Platform for PCIe Gen5 Root Complex controller IP & Gen5 PHY IP | Oct 02, 2022 |
| Cadence Design Systems, Inc. | Cadence PCIe RP Gen6 Controller and Gen6 PHY IP | Cadence PCIe Gen6 Controller & 64GT/s Excelsior SS5LPe PHY IP | PCIe 5.0 at 32GT/s | x8 | Cadence IP Demo Platform for PCIe Gen6 Root Complex controller IP & Gen6 PHY IP | Feb 29, 2024 |
PCI Express 4.0
| Company | Product Name | Identifier | Spec Revision | Max Lane Width Tested | Function | Date Added |
|---|---|---|---|---|---|---|
| Cadence Design Systems | Cadence PCIe Gen4 Controller and Gen4 PHY IP | Cadence PCIe Gen 4.0 Controller IP & 16GT/s Sierra T16FFC PCIe Gen 4.0 PHY IP | PCIe 4.0 at 16GT/s | x1 | Cadence IP Demo Platform for PCIe Gen4 Endpoint controller IP & Gen4 PHY IP | Aug 28, 2019 |
| Cadence Design Systems, Inc. | Cadence PCIe Gen4 Controller & Gen4 PHY IP | Cadence PCIe Gen5 Controller & 16GT/s Sierra GF12LP PHY IP | PCIe 4.0 at 16GT/s | x1 | Cadence IP Demo Platform for PCIe Gen4 Endpoint controller IP & Gen4 PHY IP | May 03, 2022 |
| Cadence Design Systems, Inc | Cadence PCIe EP Gen4 Controller and Gen4 PHY IP | Cadence PCIe Gen4 Controller & 16GT/s Sierra TSMC 7nm PHY IP | PCIe 4.0 at 16GT/s | x1 | Cadence IP Demo Platform for PCIe Gen4 Endpoint controller IP & Gen4 PHY IP | Jul 31, 2022 |
| Cadence Design Systems, Inc. | Cadence PCIe Gen4 Controller and Gen3 PHY IP | Cadence PCIe Gen4 Controller & 8GT/s Torrent Intel 16nm PHY IP | PCIe 4.0 at 8GT/s | x1 | Cadence IP Demo Platform for PCIe Gen4 Endpoint controller IP & Gen3 PHY IP | Oct 03, 2023 |
| Company | Product Name | Identifier | Spec Revision | Max Lane Width Tested | Function | Date Added |
|---|---|---|---|---|---|---|
| Cadence Design Systems | Cadence PCIe Gen4 Controller and Gen4 PHY IP | Cadence PCIe Gen 4.0 Controller IP & 16GT/s Sierra T16FFC PCIe Gen 4.0 PHY IP | PCIe 4.0 at 16GT/s | x1 | Cadence IP Demo Platform for PCIe Gen4 Endpoint controller IP & Gen4 PHY IP | Aug 28, 2019 |
| Cadence Design Systems, Inc. | Cadence PCIe Gen4 Controller and Gen4 PHY IP | Cadence PCIe Gen4 Controller & 16GT/s Sierra GF12LPP PHY IP | PCIe 4.0 at 16GT/s | x1 | Cadence IP Demo Platform for PCIe Gen4 Endpoint controller IP & Gen4 PHY IP | Dec 10, 2022 |
| Cadence Design Systems, Inc | Cadence PCIe EP Gen4 Controller and Gen4 PHY IP | Cadence PCIe Gen4 Controller & 16GT/s Sierra TSMC 7nm PHY IP | PCIe 4.0 at 16GT/s | x1 | Cadence IP Demo Platform for PCIe Gen4 Endpoint controller IP & Gen4 PHY IP | Jul 31, 2022 |
| Cadence Design Systems, Inc. | Cadence PCIe Gen4 Controller & Gen4 PHY IP | Cadence PCIe Gen5 Controller & 16GT/s Sierra GF12LP PHY IP | PCIe 4.0 at 16GT/s | x1 | Cadence IP Demo Platform for PCIe Gen4 Endpoint controller IP & Gen4 PHY IP | May 03, 2022 |
| Cadence Design Systems | Cadence PCIe Controller IP & 8GT/s Torrent T5 PCIe PHY IP | PCIe 4.0 at 8GT/s | x1 | Dec 09, 2021 | ||
| Cadence Design Systems | Cadence PCIe 5.0 Controller & Gen5 PHY IP | Gen5 Whistler N6/7 | PCIe 4.0 at 16GT/s | x8 | Jul 28, 2021 | |
| Cadence Design Systems, Inc. | Cadence PCIe Gen4 Controller and Gen3 PHY IP | Cadence PCIe Gen4 Controller & 8GT/s Torrent Intel 16nm PHY IP | PCIe 4.0 at 8GT/s | x1 | Cadence IP Demo Platform for PCIe Gen4 Endpoint controller IP & Gen3 PHY IP | Oct 03, 2023 |
PCI Express 2.0
| Company | Product Name | Identifier | Spec Revision | Max Lane Width Tested | Function | Date Added |
|---|---|---|---|---|---|---|
| Cadence Design System (India) Private Limited | Cadence PCIe 2.0 Controller IP & 5GT/s Torrent TSMC 7nm PCIe PHY IP | PCIe 3.0 at 5GT/s | x1 | End Point with Memory Controller Class code | Dec 19, 2017 |
| Company | Product Name | Identifier | Spec Revision | Max Lane Width Tested | Function | Date Added |
|---|---|---|---|---|---|---|
| Cadence Design System (India) Private Limited | Cadence PCIe 2.0 Controller IP & 5GT/s Torrent TSMC 7nm PCIe PHY IP | PCIe 3.0 at 5GT/s | x1 | End Point with Memory Controller Class code | Dec 19, 2017 |