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With the widespread adoption of compute-intensive workloads – such as artificial intelligence and machine learning – in enterprise and cloud data centers, high-speed, low-latency interconnects like PCI Express® architecture are required to connect high-performance nodes.
- Standards & Compliance
- PCIe 4.0
- PCIe 5.0
- PCIe retimers
- PCIe redrivers
- PCIe 5.0 specification
PCI Express® (PCIe®) technology is the most important high-speed serial bus in servers. Due to its high bandwidth and low latency characteristics, PCI Express architecture is widely used in various server interconnect scenarios, such as:
- Signal Integrity
- PCIe 5.0
- PCI Express 5.0
- PCIe CEM
- PCIe Channel Loss
At PCI-SIG, we take pride in ensuring that our specifications operate without a hitch. However, sometimes PCI Express developers need to submit Engineering Change Requests (ECRs) to update parts of the specification so that PCIe integrated products can reach their optimal functionality.
- Standards & Compliance
- PCIe Engineering Change Requests
- Firmware
- UEFI
- ACPI
I’m looking forward to attending the Flash Memory Summit (FMS) next week in Santa Clara.
- Standards & Compliance
- PCI-SIG
- Flash Memory Summit
- FMS
- NVMe
- Flash Storage
I’m pleased to share that PCI-SIG has released the PCIe 4.0 Specification Version 1.0 and it is now available for download on our website.
- Standards & Compliance
- PCIe 5.0
- PCI Express 5.0
- PCI Expres 4.0
- PCIe 4.0
- PCI-SIG