Latest Posts

Oct 03, 2023

Servers are challenged to process more intricate and diverse types of workloads in cloud, hybrid-cloud and enterprise data centers.

  • Systems & Applications
  • AI
  • Data Centers
  • Servers
  • PCIe 5.0 specification
  • PCIe 6.0 specification
  • PCIe retimers
Jan 11, 2022

Infographic of the PCIe 6.0 Architecture

  • Standards & Compliance
  • PCIe 6.0
  • PCI Express 6.0
  • PAM4
  • PCIe Storage
  • PCI Express specification
  • FLIT
  • Forward Error Correction
Dec 18, 2021

PCI-SIG® has continued to host PCI Express® (PCIe®) Compliance Workshops throughout 2021 as we recognize that they are an important member benefit.

  • Standards & Compliance
  • Compliance
  • PCIe 5.0 specification
  • PCIe 5.0
  • PCI-SIG Integrators List
  • PCI Express 5.0
Dec 14, 2021

PCI-SIG® built upon our momentum from 2020 with another successful year in 2021. From progress on the PCIe 5.0 architecture compliance program to the impending release of the PCIe 6.0 specification, we have hit many exciting milestones.

  • Standards & Compliance
  • PCI Express 5.0
  • PCI Express 6.0
  • PCI Express 6.0 Specification
  • PCI Express compliance
  • PCI Express specification
  • PCI-SIG
  • PCI-SIG Compliance
  • PCI-SIG Membership
  • PCIe 5.0 specification
  • PCIe 6.0 specification
Aug 19, 2021

The upcoming PCIe® 6.0 specification introduces Flow Control Unit (FLIT) encoding, which enables the specification to provide low latency with high efficiency. FLIT mode is adopted for the PCIe 6.0 architecture because error correction needs to operate on fixed sized packets.

  • PCIe 6.0
  • PCI Express 6.0
  • PAM4
  • PCIe FEC
  • Forward Error Correction
  • FLIT
Jul 16, 2021

By: Hope Bovenzi, Strategic Marketing, Astera Labs

  • Signal Integrity
  • automotive
  • PCIe
  • PCI Express
  • PCIe Storage
  • PCIe Retimer
  • PCIe connectivity
  • PCIe Bandwidth
  • PCI-SIG Automotive Taskforce
Mar 17, 2021

The PCI Express® (PCIe®) 6.0 specification will provide multiple features, including Transaction Layer Packet (TLP) payload, encoding and decoding, shared credit pooling, Forward Error Correction (FEC), CRC error correction, and more.

  • Standards & Compliance
  • PCI-SIG Automotive Taskforce
Jan 22, 2021

With the widespread adoption of compute-intensive workloads – such as artificial intelligence and machine learning – in enterprise and cloud data centers, high-speed, low-latency interconnects like PCI Express® architecture are required to connect high-performance nodes.

  • Standards & Compliance
  • PCIe 4.0
  • PCIe 5.0
  • PCIe retimers
  • PCIe redrivers
  • PCIe 5.0 specification
Nov 30, 2020

Wow, 2020 sure has transformed the ways we connect, learn and innovate in industries around the world, and in our daily lives!

  • Standards & Compliance
  • PCI Express compliance
  • PCI-SIG Integrators List
  • PCIe 4.0
  • PCIe 3.0
Aug 11, 2020

One of the many new features included in the PCI Express® (PCIe®) specification will be PAM4 (Pulse Amplitude Modulation with 4 levels) signaling.

  • Systems & Applications
  • PCIe 6.0
  • PCI Express 6.0
  • What is PAM4
  • PAM4
  • PCIe FEC
  • Forward Error Correction

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