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As the complexity of computer workloads in the automotive market increase, so does the sophistication of computers in vehicles, along with the interconnect performance requirements. A unique emerging challenge is Automotive Functional Safety (FuSA).
- Systems & Applications
- automotive
- PCI Express
- PCIe Specification
- PCIe 5.0
- PCIe 6.0
In early 2022, PCI-SIG® released the full version of the PCI Express® (PCIe®) 6.0 specification.
- Systems & Applications
- PCIe 6.0
- PAM4
- PAM4 signaling
- PCI Express 6.0
- PCI Express 6.0 Specification
- PCIe 6.0 architecture
Following the release of the PCI Express® (PCIe®) 6.0 specification to members earlier this year, PCI-SIG® had the unique opportunity to participate in three IT industry podcasts.
- PCI Express 6.0
- PCI Express 6.0 Specification
- PCIe 6.0 specification
- PCIe 6.0 architecture
- PCI-SIG Compliance
- PCI-SIG Membership
Infographic of the PCIe 6.0 Architecture
- Standards & Compliance
- PCIe 6.0
- PCI Express 6.0
- PAM4
- PCIe Storage
- PCI Express specification
- FLIT
- Forward Error Correction
PCI-SIG® Compliance Workshop Updates: Workshop #118 Recap, PCIe 5.0 Specification Workshops and More
PCI-SIG® has continued to host PCI Express® (PCIe®) Compliance Workshops throughout 2021 as we recognize that they are an important member benefit.
- Standards & Compliance
- Compliance
- PCIe 5.0 specification
- PCIe 5.0
- PCI-SIG Integrators List
- PCI Express 5.0
The upcoming PCIe® 6.0 specification introduces Flow Control Unit (FLIT) encoding, which enables the specification to provide low latency with high efficiency. FLIT mode is adopted for the PCIe 6.0 architecture because error correction needs to operate on fixed sized packets.
- PCIe 6.0
- PCI Express 6.0
- PAM4
- PCIe FEC
- Forward Error Correction
- FLIT
With global health and safety concerns related to the Covid-19 pandemic still greatly limiting in-person events in 2021, PCI-SIG® continues to offer compliance workshop opportunities to our members virtually.
- Standards & Compliance
- PCIe 6.0 specification
- PAM4 signaling
- PCIe 6.0 architecture
- PCIe form factor
- FLIT Mode
- PCIe FEC
With the widespread adoption of compute-intensive workloads – such as artificial intelligence and machine learning – in enterprise and cloud data centers, high-speed, low-latency interconnects like PCI Express® architecture are required to connect high-performance nodes.
- Standards & Compliance
- PCIe 4.0
- PCIe 5.0
- PCIe retimers
- PCIe redrivers
- PCIe 5.0 specification
One of the many new features included in the PCI Express® (PCIe®) specification will be PAM4 (Pulse Amplitude Modulation with 4 levels) signaling.
- Systems & Applications
- PCIe 6.0
- PCI Express 6.0
- What is PAM4
- PAM4
- PCIe FEC
- Forward Error Correction
PCI-SIG® has shifted to virtual events for the 2020 calendar year and our first major members event was the Virtual PCI-SIG Developers Conference.
- Systems & Applications
- PCI-SIG DevCon
- PCIe 5.0
- PCI Express 5.0
- PCIe 4.0
- PCI Express 4.0 PCIe Retimer
- PCI Express Retimer