Latest Posts

Jan 11, 2022

Infographic of the PCIe 6.0 Architecture

  • Standards & Compliance
  • PCIe 6.0
  • PCI Express 6.0
  • PAM4
  • PCIe Storage
  • PCI Express specification
  • FLIT
  • Forward Error Correction
Jul 16, 2021

By: Hope Bovenzi, Strategic Marketing, Astera Labs

  • Signal Integrity
  • automotive
  • PCIe
  • PCI Express
  • PCIe Storage
  • PCIe Retimer
  • PCIe connectivity
  • PCIe Bandwidth
  • PCI-SIG Automotive Taskforce
Jan 22, 2021

With the widespread adoption of compute-intensive workloads – such as artificial intelligence and machine learning – in enterprise and cloud data centers, high-speed, low-latency interconnects like PCI Express® architecture are required to connect high-performance nodes.

  • Standards & Compliance
  • PCIe 4.0
  • PCIe 5.0
  • PCIe retimers
  • PCIe redrivers
  • PCIe 5.0 specification
Feb 19, 2020

We are starting 2020 with the release of version 0.5 of the PCI Express® (PCIe®) 6.0 specification incorporating the significant member feedback received on version 0.3.

  • Standards & Compliance
  • PCIe 6.0
  • PCI Express 6.0
  • PAM4
  • PCIe FEC
  • Forward Error Correction
  • FLIT
  • PCI Express specification
Oct 19, 2019

The first installment of the PCI-SIG® educational webinar series, “Retimers to the Rescue: PCI Express® Specifications Reach Their Full Potential” premiered on October 9, 2019.

  • Signal Integrity
  • PCIe 5.0
  • PCI Express 5.0
  • PCIe Retimer
  • PCIe Redriver
Sep 03, 2019

Retimers and redrivers have enabled longer physical channels in servers and storage systems since Peripheral Component Interface Express (PCIe®) 3.0 specification was first introduced almost 10 years ago.

  • Signal Integrity
  • PCIe 5.0
  • PCI Express 5.0
  • PCIe 4.0
  • PCI Express 4.0
  • PCIe Retimer
  • PCIe Redriver
  • PCI Express specification