Latest Posts

Feb 04, 2023

In early 2022, PCI-SIG® released the full version of the PCI Express® (PCIe®) 6.0 specification.

  • Systems & Applications
  • PCIe 6.0
  • PAM4
  • PAM4 signaling
  • PCI Express 6.0
  • PCI Express 6.0 Specification
  • PCIe 6.0 architecture
Mar 29, 2022

Following the release of the PCI Express® (PCIe®) 6.0 specification to members earlier this year, PCI-SIG® had the unique opportunity to participate in three IT industry podcasts.

  • PCI Express 6.0
  • PCI Express 6.0 Specification
  • PCIe 6.0 specification
  • PCIe 6.0 architecture
  • PCI-SIG Compliance
  • PCI-SIG Membership
Oct 06, 2021

I am excited to report that PCI-SIG has released PCIe 6.0 specification, version 0.9 to our members. This is a major milestone in our continued effort to double the data rate of the PCI Express® specifications while maintaining backwards compatibility.

  • Standards & Compliance
  • PCIe 6.0 specification
  • PCIe 6.0
  • PAM4
  • PCIe FEC
  • FLIT
  • PCI Express specification
Aug 19, 2021

The upcoming PCIe® 6.0 specification introduces Flow Control Unit (FLIT) encoding, which enables the specification to provide low latency with high efficiency. FLIT mode is adopted for the PCIe 6.0 architecture because error correction needs to operate on fixed sized packets.

  • PCIe 6.0
  • PCI Express 6.0
  • PAM4
  • PCIe FEC
  • Forward Error Correction
  • FLIT
Apr 09, 2021

With global health and safety concerns related to the Covid-19 pandemic still greatly limiting in-person events in 2021, PCI-SIG® continues to offer compliance workshop opportunities to our members virtually.

  • Standards & Compliance
  • PCIe 6.0 specification
  • PAM4 signaling
  • PCIe 6.0 architecture
  • PCIe form factor
  • FLIT Mode
  • PCIe FEC
Apr 09, 2021

With global health and safety concerns related to the Covid-19 pandemic still greatly limiting in-person events in 2021, PCI-SIG® continues to offer compliance workshop opportunities to our members virtually.

  • Standards & Compliance
  • PCIe 6.0 specification
  • PAM4 signaling
  • PCIe 6.0 architecture
  • PCIe form factor
  • FLIT Mode
  • PCIe FEC
Sep 28, 2020

The PCI Express® (PCIe®) 6.0 specification will feature two primary mechanisms to correct errors: Forward Error Correction (FEC) and Cyclic Redundancy Check (CRC). Each 256-byte FLIT comprises of 242 bytes of payload which are protected by 8 Bytes of CRC.

  • Systems & Applications
  • PCIe 6.0
  • PCI Express 6.0
  • PCIe FEC
Aug 11, 2020

One of the many new features included in the PCI Express® (PCIe®) specification will be PAM4 (Pulse Amplitude Modulation with 4 levels) signaling.

  • Systems & Applications
  • PCIe 6.0
  • PCI Express 6.0
  • What is PAM4
  • PAM4
  • PCIe FEC
  • Forward Error Correction
Jun 22, 2020

For almost two decades, the PCI Express® (PCIe®) architecture has offered low latency and high bandwidth in support of next generation systems.

  • Systems & Applications
  • PCIe 6.0
  • PCI Express 6.0
  • PAM4
  • PCIe FEC
  • Forward Error Correction
  • FLIT
Jun 11, 2020

PCI Express® (PCIe®) technology is the most important high-speed serial bus in servers. Due to its high bandwidth and low latency characteristics, PCI Express architecture is widely used in various server interconnect scenarios, such as:

  • Signal Integrity
  • PCIe 5.0
  • PCI Express 5.0
  • PCIe CEM
  • PCIe Channel Loss

Pages