Latest Posts

Aug 19, 2021

The upcoming PCIe® 6.0 specification introduces Flow Control Unit (FLIT) encoding, which enables the specification to provide low latency with high efficiency. FLIT mode is adopted for the PCIe 6.0 architecture because error correction needs to operate on fixed sized packets.

  • PCIe 6.0
  • PCI Express 6.0
  • PAM4
  • PCIe FEC
  • Forward Error Correction
  • FLIT
Jul 16, 2021

By: Hope Bovenzi, Strategic Marketing, Astera Labs

  • Signal Integrity
  • automotive
  • PCIe
  • PCI Express
  • PCIe Storage
  • PCIe Retimer
  • PCIe connectivity
  • PCIe Bandwidth
  • PCI-SIG Automotive Taskforce
Aug 11, 2020

One of the many new features included in the PCI Express® (PCIe®) specification will be PAM4 (Pulse Amplitude Modulation with 4 levels) signaling.

  • Systems & Applications
  • PCIe 6.0
  • PCI Express 6.0
  • What is PAM4
  • PAM4
  • PCIe FEC
  • Forward Error Correction
Jun 22, 2020

For almost two decades, the PCI Express® (PCIe®) architecture has offered low latency and high bandwidth in support of next generation systems.

  • Systems & Applications
  • PCIe 6.0
  • PCI Express 6.0
  • PAM4
  • PCIe FEC
  • Forward Error Correction
  • FLIT
Feb 19, 2020

We are starting 2020 with the release of version 0.5 of the PCI Express® (PCIe®) 6.0 specification incorporating the significant member feedback received on version 0.3.

  • Standards & Compliance
  • PCIe 6.0
  • PCI Express 6.0
  • PAM4
  • PCIe FEC
  • Forward Error Correction
  • FLIT
  • PCI Express specification
Dec 18, 2019

According to Tractica, Artificial Intelligence (AI) and Machine Learning (ML) markets are set to grow to $118.6 billion by 2025—as  these new technologies are becoming the heart of our digital lives.

  • Systems & Applications
  • PCIe 5.0
  • PCI Express 5.0
  • PCIe Bandwidth
Dec 07, 2019

Our PCI-SIG® members have been hard at work. In 2017, we delivered PCI Express® 4.0 with its 16 GT/s, while also diving headfirst into PCI Express 5.0 development – first announced at our annual PCI-SIG DevCon in June 2017.

  • Standards & Compliance
  • PCI-SIG
  • PCIe 5.0
  • PCI Express 5.0
  • PCIe Bandwidth
Apr 19, 2019

PCI-SIG has built its reputation on delivering high quality PCI Express® (PCIe) specifications that have doubled bandwidth on average every three years, while maintaining full backwards compatibility with prior generations.

  • Signal Integrity
  • PCIe Lane Margining
  • PCIe 4.0
  • PCI Express 4.0
  • PCIe Bandwidth
  • PCIe retimers
  • PCIe Test Equipment
Dec 07, 2018

Our PCI-SIG® members have been hard at work. In 2017, we delivered PCI Express® 4.0 with its 16 GT/s, while also diving headfirst into PCI Express 5.0 development – first announced at our annual PCI-SIG DevCon in June 2017.

  • Standards & Compliance
  • PCI-SIG
  • PCIe 5.0
  • PCI Express 5.0
  • PCIe Bandwidth
Oct 24, 2017

I’m pleased to share that PCI-SIG has released the PCIe 4.0 Specification Version 1.0 and it is now available for download on our website.

  • Standards & Compliance
  • PCIe 5.0
  • PCI Express 5.0
  • PCI Expres 4.0
  • PCIe 4.0
  • PCI-SIG