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Sep 19, 2023

Author’s Note: This blog discusses new functionality introduced in the PCIe 6.0 specification, but please note that the PCIe 6.0.1 and PCIe 6.1 specification revisions have been published.

  • PCI Express Specification
  • PCI Express 6.0 Specification
  • PCIe 6.0 specification
  • PCI Express 6.0
  • PCI Express 6.0 Forward Error Correction
  • PCIe 6.0 FEC
  • FLIT Mode
Jan 11, 2022

Infographic of the PCIe 6.0 Architecture

  • Standards & Compliance
  • PCIe 6.0
  • PCI Express 6.0
  • PAM4
  • PCIe Storage
  • PCI Express specification
  • FLIT
  • Forward Error Correction
Aug 19, 2021

The upcoming PCIe® 6.0 specification introduces Flow Control Unit (FLIT) encoding, which enables the specification to provide low latency with high efficiency. FLIT mode is adopted for the PCIe 6.0 architecture because error correction needs to operate on fixed sized packets.

  • PCIe 6.0
  • PCI Express 6.0
  • PAM4
  • PCIe FEC
  • Forward Error Correction
  • FLIT
Aug 11, 2020

One of the many new features included in the PCI Express® (PCIe®) specification will be PAM4 (Pulse Amplitude Modulation with 4 levels) signaling.

  • Systems & Applications
  • PCIe 6.0
  • PCI Express 6.0
  • What is PAM4
  • PAM4
  • PCIe FEC
  • Forward Error Correction
Jun 22, 2020

For almost two decades, the PCI Express® (PCIe®) architecture has offered low latency and high bandwidth in support of next generation systems.

  • Systems & Applications
  • PCIe 6.0
  • PCI Express 6.0
  • PAM4
  • PCIe FEC
  • Forward Error Correction
  • FLIT
Jun 11, 2020

PCI Express® (PCIe®) technology is the most important high-speed serial bus in servers. Due to its high bandwidth and low latency characteristics, PCI Express architecture is widely used in various server interconnect scenarios, such as:

  • Signal Integrity
  • PCIe 5.0
  • PCI Express 5.0
  • PCIe CEM
  • PCIe Channel Loss
Feb 19, 2020

We are starting 2020 with the release of version 0.5 of the PCI Express® (PCIe®) 6.0 specification incorporating the significant member feedback received on version 0.3.

  • Standards & Compliance
  • PCIe 6.0
  • PCI Express 6.0
  • PAM4
  • PCIe FEC
  • Forward Error Correction
  • FLIT
  • PCI Express specification
Jun 19, 2019

I am happy to share that PCI-SIG® has begun developing the PCI Express® (PCIe®) 6.0 specification, targeted for release in 2021.

  • Systems & Applications
  • PCIe 6.0
  • PCI Express 6.0
  • PCIe PAM4
  • PCIe FEC
  • PCIe Forward Error Correction
  • PCIe 6.0 specification
  • PCI Express 6.0 Specification
  • PCI Express PAM4
  • PCIe 6.0 FEC
  • PCI Express 6.0 FEC
  • PCIe6.0 Forward Error Correction
  • PCI Express 6.0 Forward Error Correction
Jul 31, 2018

I’m looking forward to attending the Flash Memory Summit (FMS) next week in Santa Clara.

  • Standards & Compliance
  • PCI-SIG
  • Flash Memory Summit
  • FMS
  • NVMe
  • Flash Storage
Jul 31, 2018

I’m looking forward to attending the Flash Memory Summit (FMS) next week in Santa Clara.

  • Standards & Compliance
  • PCI-SIG
  • Flash Memory Summit
  • FMS
  • NVMe
  • Flash Storage