Latest Posts

Sep 13, 2022

Around the World with PCI-SIG: Join Us at the 2022 International DevCons

By Richard Solomon, PCI-SIG Vice President and Developers Conference Chair

  • Standards and Compliance
  • Developers Conference
  • PCI-SIG DevCon
  • PCI-SIG
  • PCI-SIG Membership
Jul 29, 2022

By Scott Knowlton and Mihaela Erler, PCI-SIG MWG Co-Chairs

  • Standards & Compliance
  • Developers Conference
  • PCI-SIG DevCon
  • PCI-SIG
  • PCI-SIG Membership
Jul 28, 2022

The PCI-SIG® Board of Directors honored three individuals for their years of service and contributions to the development and expansion of PCI Express® (PCIe®) technology during the PCI-SIG US DevCon 2022 on June 21-22 in

  • Standards & Compliance
  • Developers Conference
  • PCI-SIG DevCon
  • PCI-SIG
  • PCI-SIG Membership
Jul 20, 2022

During the PCI-SIG® US DevCon 2022, the PCI-SIG Board of Directors surprised two individuals for their years of service and contributions to the development and expansion of PCI Express® (PCIe®) technology.

  • Standards & Compliance
  • Developers Conference
  • PCI-SIG DevCon
  • PCIe 6.0
  • PCI Express 6.0
  • PCI Express specification
May 17, 2022

It’s hard to believe it’s been 30 years since PCI-SIG® formed in 1992.

  • Standards & Compliance
  • Compliance
  • PCI Express 5.0
  • PCIe 5.0 Compliance
  • PCI-SIG
  • PCI-SIG Compliance
  • PCI-SIG Integrators List
Mar 29, 2022

Following the release of the PCI Express® (PCIe®) 6.0 specification to members earlier this year, PCI-SIG® had the unique opportunity to participate in three IT industry podcasts.

  • PCI Express 6.0
  • PCI Express 6.0 Specification
  • PCIe 6.0 specification
  • PCIe 6.0 architecture
  • PCI-SIG Compliance
  • PCI-SIG Membership
Jan 11, 2022

Introduction

  • Standards & Compliance
  • PCIe 6.0
  • PCI Express 6.0
  • PAM4
  • PCIe Storage
  • PCI Express specification
  • FLIT
  • Forward Error Correct
Jan 11, 2022

For nearly three decades, PCI Express® (PCIe®) technology has served as the de facto high bandwidth, low latency interconnect. As the industry evolves to meet the needs of data-intensive applications, the PCIe specification has kept pace, enabling future innovation.

  • Standards & Compliance
  • PCIe 6.0
  • PCI Express 6.0
  • PAM4
  • PCIe Storage
  • PCI Express specification
  • FLIT
  • Forward Error Correct
Jan 11, 2022

We are pleased to commence 2022 on a high note with the official release of the PCI Express® (PCIe®) 6.0 specification to members.

  • Standards & Compliance
  • PCIe 6.0
  • PCI Express 6.0
  • PAM4
  • PCIe Storage
  • PCI Express specification
  • FLIT
  • Forward Error Correct
Jan 11, 2022

Infographic of the PCIe 6.0 Architecture

  • Standards & Compliance
  • PCIe 6.0
  • PCI Express 6.0
  • PAM4
  • PCIe Storage
  • PCI Express specification
  • FLIT
  • Forward Error Correction
Dec 18, 2021

PCI-SIG® has continued to host PCI Express® (PCIe®) Compliance Workshops throughout 2021 as we recognize that they are an important member benefit.

  • Standards & Compliance
  • Compliance
  • PCIe 5.0 specification
  • PCIe 5.0
  • PCI-SIG Integrators List
  • PCI Express 5.0
Dec 14, 2021

PCI-SIG® built upon our momentum from 2020 with another successful year in 2021. From progress on the PCIe 5.0 architecture compliance program to the impending release of the PCIe 6.0 specification, we have hit many exciting milestones.

  • Standards & Compliance
  • PCI Express 5.0
  • PCI Express 6.0
  • PCI Express 6.0 Specification
  • PCI Express compliance
  • PCI Express specification
  • PCI-SIG
  • PCI-SIG Compliance
  • PCI-SIG Membership
  • PCIe 5.0 specification
  • PCIe 6.0 specification
Oct 06, 2021

I am excited to report that PCI-SIG has released PCIe 6.0 specification, version 0.9 to our members. This is a major milestone in our continued effort to double the data rate of the PCI Express® specifications while maintaining backwards compatibility.

  • Standards & Compliance
  • PCIe 6.0 specification
  • PCIe 6.0
  • PAM4
  • PCIe FEC
  • FLIT
  • PCI Express specification
Sep 24, 2021

The CXL™ Consortium and PCI-SIG® are excited to announce a memorandum of understanding (MOU) between the two organizations.

  • Standards & Compliance
  • PCIe
  • PCI-SIG
  • CXL
  • PCI Express specification
  • CXL Consortium
Aug 19, 2021

The upcoming PCIe® 6.0 specification introduces Flow Control Unit (FLIT) encoding, which enables the specification to provide low latency with high efficiency. FLIT mode is adopted for the PCIe 6.0 architecture because error correction needs to operate on fixed sized packets.

  • PCIe 6.0
  • PCI Express 6.0
  • PAM4
  • PCIe FEC
  • Forward Error Correction
  • FLIT
Jun 05, 2021

Mohiuddin Mazumder of Intel was honored at this year’s PCI-SIG US DevCon

  • Developers Conference
  • PCI-SIG DevCon
  • PCI-SIG
  • PCI Express
Jun 05, 2021

Manisha Nilange of Intel was honored at this year’s PCI-SIG US DevCon

  • Developers Conference
  • PCI-SIG DevCon
  • PCI-SIG
  • PCI Express
Jun 22, 2020

For almost two decades, the PCI Express® (PCIe®) architecture has offered low latency and high bandwidth in support of next generation systems.

  • Systems & Applications
  • PCIe 6.0
  • PCI Express 6.0
  • PAM4
  • PCIe FEC
  • Forward Error Correction
  • FLIT
Feb 19, 2020

We are starting 2020 with the release of version 0.5 of the PCI Express® (PCIe®) 6.0 specification incorporating the significant member feedback received on version 0.3.

  • Standards & Compliance
  • PCIe 6.0
  • PCI Express 6.0
  • PAM4
  • PCIe FEC
  • Forward Error Correction
  • FLIT
  • PCI Express specification
Oct 14, 2019

I’m pleased to share that PCI-SIG® continues to make great progress on the development of our next generation of PCIe® technology – the 

  • Physical Form Factors
  • PCIe 6.0
  • PCI Express 6.0
  • PCIe PAM4
  • PCIe FEC
  • PCIe Forward Error Correction
  • PCIe 6.0 specification
  • PCI Express 6.0 Specification
Jul 23, 2019

The SD Association (SDA) recently announced SD Express, which adds the PCI Express® and NVMe™ interfaces to the SD interface. The PCIe® interface delivers transfer rates up to 985 megabytes per second (MB/s) and supports backward compatibility with existing SD hosts.

  • Standards & Compliance
  • PCI-SIG
  • SD Association
  • SD Express
  • NVMe
  • PCIe 3.0
  • PCI Express 3.0
Jul 23, 2019

The SD Association (SDA) recently announced SD Express, which adds the PCI Express® and NVMe™ interfaces to the SD interface. The PCIe® interface delivers transfer rates up to 985 megabytes per second (MB/s) and supports backward compatibility with existing SD hosts.

  • Standards & Compliance
  • PCI-SIG
  • SD Association
  • SD Express
  • NVMe
  • PCIe 3.0
  • PCI Express 3.0
Jul 23, 2019

The SD Association (SDA) recently announced SD Express, which adds the PCI Express® and NVMe™ interfaces to the SD interface. The PCIe® interface delivers transfer rates up to 985 megabytes per second (MB/s) and supports backward compatibility with existing SD hosts.

  • Standards & Compliance
  • PCI-SIG
  • SD Association
  • SD Express
  • NVMe
  • PCIe 3.0
  • PCI Express 3.0
Jun 19, 2019

I am happy to share that PCI-SIG® has begun developing the PCI Express® (PCIe®) 6.0 specification, targeted for release in 2021.

  • Systems & Applications
  • PCIe 6.0
  • PCI Express 6.0
  • PCIe PAM4
  • PCIe FEC
  • PCIe Forward Error Correction
  • PCIe 6.0 specification
  • PCI Express 6.0 Specification
  • PCI Express PAM4
  • PCIe 6.0 FEC
  • PCI Express 6.0 FEC
  • PCIe6.0 Forward Error Correction
  • PCI Express 6.0 Forward Error Correction
Feb 06, 2019

This is already shaping up to be a busy year for PCI-SIG® with the pending release of the PCI Express® 5.0 specification targete

  • Standards & Compliance
  • PCIe 5.0
  • PCI Express 5.0
  • Embedded World
  • SD Association
  • OCP Global Summit
Dec 19, 2018

I’m happy to share that 2018 has been another productive year for PCI-SIG. In addition to significant progress in our specification development and compliance work, we also continued to provide educational resources to our members and the industry.

  • Standards & Compliance
  • PCI-SIG
  • PCIe 5.0
  • PCI Express 5.0
  • OCP Summit
  • Flash Memory Summit
  • Developers Conference
Nov 08, 2018

The PCI-SIG Serial Enabling Workgroup (called the “SEG” for short) is the PCI-SIG workgroup charged with running the PCI Express® (PCIe®) compliance program.

  • Standards & Compliance
  • PCI-SIG
  • PCI-SIG Compliance
  • PCI-SIG Interoperability
  • PCI-SIG Integrators List
Oct 04, 2018

By now, you probably know about the PCI-SIG Developers Conference which we hold in Santa Clara each year – a free event for our 750+ member companies with four tracks of presentations over two days.

  • Standards & Compliance
  • Technology
  • PCI Express
  • PCI-SIG
  • Compliance
  • Developers Conference
Oct 04, 2018

By now, you probably know about the PCI-SIG Developers Conference which we hold in Santa Clara each year – a free event for our 750+ member companies with four tracks of presentations over two days.

  • Standards & Compliance
  • Technology
  • PCI Express
  • PCI-SIG
  • Compliance
  • Developers Conference
Jul 31, 2018

I’m looking forward to attending the Flash Memory Summit (FMS) next week in Santa Clara.

  • Standards & Compliance
  • PCI-SIG
  • Flash Memory Summit
  • FMS
  • NVMe
  • Flash Storage
May 13, 2018

Press conference on June 5 to announce PCIe 5.0 spec updates

  • Standards & Compliance
  • PCI Express 5.0
  • PCI-SIG
  • PCIe 5.0
  • Developers Conference
  • Specification