It’s hard to believe it’s been 30 years since PCI-SIG® formed in 1992.

PCI-SIG® has continued to host PCI Express® (PCIe®) Compliance Workshops throughout 2021 as we recognize that they are an important member benefit.

With global health and safety concerns related to the Covid-19 pandemic still greatly limiting in-person events in 2021, PCI-SIG^® continues to offer compliance workshop opportunities to our members virtually.

With the widespread adoption of compute-intensive workloads – such as artificial intelligence and machine learning – in enterprise and cloud data centers, high-speed, low-latency interconnects like PCI Express^® architecture are required to connect high-performance nodes.

PCI Express^® (PCIe^®) technology is the most important high-speed serial bus in servers. Due to its high bandwidth and low latency characteristics, PCI Express architecture is widely used in various server interconnect scenarios, such as:

As I look back on 2019, I’m proud to report that it has been a banner year for PCI-SIG^®.

From Israel to Europe and Japan to Taiwan, the PCI-SIG^® Israel, Europe and APAC 2019 Developers Conference tour has come to an end for the year.

PCI Express^® (PCIe^®) technology is deployed worldwide by PCI-SIG member companies, so it only makes sense that PCI-SIG^® travels around the globe too.

Earlier this month, I attended another eventful Flash Memory Summit (FMS) and I am pleased to say that PCI Express^® (PCIe^®) was around every corner at this year’s event.

This year’s Flash Memory Summit (FMS) is coming up on August 6. As PCI Express technologies continue to evolve and make strides in the industry, PCI-SIG^® is excited to highlight our participation in the growth of flash storage.

PCI-SIG^® is proud to announce that we have established a working relationship with DMTF to simplify hardware management.

PCI-SIG has built its reputation on delivering high quality PCI Express^® (PCIe) specifications that have doubled bandwidth on average every three years, while maintaining full backwards compatibility with prior generations.

At PCI-SIG, we take pride in ensuring that our specifications operate without a hitch. However, sometimes PCI Express developers need to submit Engineering Change Requests (ECRs) to update parts of the specification so that PCIe integrated products can reach their optimal functionality.

This is already shaping up to be a busy year for PCI-SIG^® with the pending release of the PCI Express^® 5.0 specification targete

I’m happy to share that 2018 has been another productive year for PCI-SIG. In addition to significant progress in our specification development and compliance work, we also continued to provide educational resources to our members and the industry.

The PCI-SIG Serial Enabling Workgroup (called the “SEG” for short) is the PCI-SIG workgroup charged with running the PCI Express^® (PCIe^®) compliance program.

By now, you probably know about the PCI-SIG Developers Conference which we hold in Santa Clara each year – a free event for our 750+ member companies with four tracks of presentations over two days.

PCI Express (PCIe^®) has been widely adopted in a number of applications that range from small, power-constrained IoT sensors and mobile devices to servers and networking and communications equipment.

I’m looking forward to attending the Flash Memory Summit (FMS) next week in Santa Clara.