Latest Posts

Jan 11, 2022

Infographic of the PCIe 6.0 Architecture

  • Standards & Compliance
  • PCIe 6.0
  • PCI Express 6.0
  • PAM4
  • PCIe Storage
  • PCI Express specification
  • FLIT
  • Forward Error Correction
Aug 19, 2021

The upcoming PCIe® 6.0 specification introduces Flow Control Unit (FLIT) encoding, which enables the specification to provide low latency with high efficiency. FLIT mode is adopted for the PCIe 6.0 architecture because error correction needs to operate on fixed sized packets.

  • PCIe 6.0
  • PCI Express 6.0
  • PAM4
  • PCIe FEC
  • Forward Error Correction
  • FLIT
Jan 22, 2021

With the widespread adoption of compute-intensive workloads – such as artificial intelligence and machine learning – in enterprise and cloud data centers, high-speed, low-latency interconnects like PCI Express® architecture are required to connect high-performance nodes.

  • Standards & Compliance
  • PCIe 4.0
  • PCIe 5.0
  • PCIe retimers
  • PCIe redrivers
  • PCIe 5.0 specification
Dec 26, 2020

Despite the many challenges in 2020, we are proud to report that it has been a successful year for, PCI-SIG®.  We continued the momentum started in 2019 with PCIe® 4.0 Compliance Testing, continued work on the PCIe 6.0 specification, and brought our members new ways to engag

  • Standards & Compliance
  • PCIe 6.0 specification
  • PCIe 4.0
  • PCI-SIG DevCon
Nov 30, 2020

Wow, 2020 sure has transformed the ways we connect, learn and innovate in industries around the world, and in our daily lives!

  • Standards & Compliance
  • PCI Express compliance
  • PCI-SIG Integrators List
  • PCIe 4.0
  • PCIe 3.0
Aug 11, 2020

One of the many new features included in the PCI Express® (PCIe®) specification will be PAM4 (Pulse Amplitude Modulation with 4 levels) signaling.

  • Systems & Applications
  • PCIe 6.0
  • PCI Express 6.0
  • What is PAM4
  • PAM4
  • PCIe FEC
  • Forward Error Correction
Jun 23, 2020

PCI-SIG® has shifted to virtual events for the 2020 calendar year and our first major members event was the Virtual PCI-SIG Developers Conference.

  • Systems & Applications
  • PCI-SIG DevCon
  • PCIe 5.0
  • PCI Express 5.0
  • PCIe 4.0
  • PCI Express 4.0 PCIe Retimer
  • PCI Express Retimer
Jun 23, 2020

PCI-SIG® has shifted to virtual events for the 2020 calendar year and our first major members event was the Virtual PCI-SIG Developers Conference.

  • Systems & Applications
  • PCI-SIG DevCon
  • PCIe 5.0
  • PCI Express 5.0
  • PCIe 4.0
  • PCI Express 4.0 PCIe Retimer
  • PCI Express Retimer
Jun 22, 2020

For almost two decades, the PCI Express® (PCIe®) architecture has offered low latency and high bandwidth in support of next generation systems.

  • Systems & Applications
  • PCIe 6.0
  • PCI Express 6.0
  • PAM4
  • PCIe FEC
  • Forward Error Correction
  • FLIT
Feb 27, 2020

At this year’s Open Compute Project Global Summit in San Jose on March 4 -5, attendees will have the opportunity to learn how PCI Express® (PCIe®) specifications enable OCP systems today and how newer versions of

  • Systems & Applications
  • PCIe 6.0
  • PCI Express 6.0
  • PCIe 5.0
  • PCI Express 5.0
  • PCIe 4.0
  • PCI Express 4.0
  • OCP Summit
  • Open Compute Project

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