Latest Posts

Aug 19, 2021

The upcoming PCIe® 6.0 specification introduces Flow Control Unit (FLIT) encoding, which enables the specification to provide low latency with high efficiency. FLIT mode is adopted for the PCIe 6.0 architecture because error correction needs to operate on fixed sized packets.

  • PCIe 6.0
  • PCI Express 6.0
  • PAM4
  • PCIe FEC
  • Forward Error Correction
  • FLIT
Aug 11, 2020

One of the many new features included in the PCI Express® (PCIe®) specification will be PAM4 (Pulse Amplitude Modulation with 4 levels) signaling.

  • Systems & Applications
  • PCIe 6.0
  • PCI Express 6.0
  • What is PAM4
  • PAM4
  • PCIe FEC
  • Forward Error Correction
Jun 22, 2020

For almost two decades, the PCI Express® (PCIe®) architecture has offered low latency and high bandwidth in support of next generation systems.

  • Systems & Applications
  • PCIe 6.0
  • PCI Express 6.0
  • PAM4
  • PCIe FEC
  • Forward Error Correction
  • FLIT
Feb 27, 2020

At this year’s Open Compute Project Global Summit in San Jose on March 4 -5, attendees will have the opportunity to learn how PCI Express® (PCIe®) specifications enable OCP systems today and how newer versions of

  • Systems & Applications
  • PCIe 6.0
  • PCI Express 6.0
  • PCIe 5.0
  • PCI Express 5.0
  • PCIe 4.0
  • PCI Express 4.0
  • OCP Summit
  • Open Compute Project
Feb 27, 2020

At this year’s Open Compute Project Global Summit in San Jose on March 4 -5, attendees will have the opportunity to learn how PCI Express® (PCIe®) specifications enable OCP systems today and how newer versions of

  • Systems & Applications
  • PCIe 6.0
  • PCI Express 6.0
  • PCIe 5.0
  • PCI Express 5.0
  • PCIe 4.0
  • PCI Express 4.0
  • OCP Summit
  • Open Compute Project
Feb 19, 2020

We are starting 2020 with the release of version 0.5 of the PCI Express® (PCIe®) 6.0 specification incorporating the significant member feedback received on version 0.3.

  • Standards & Compliance
  • PCIe 6.0
  • PCI Express 6.0
  • PAM4
  • PCIe FEC
  • Forward Error Correction
  • FLIT
  • PCI Express specification
Sep 03, 2019

Retimers and redrivers have enabled longer physical channels in servers and storage systems since Peripheral Component Interface Express (PCIe®) 3.0 specification was first introduced almost 10 years ago.

  • Signal Integrity
  • PCIe 5.0
  • PCI Express 5.0
  • PCIe 4.0
  • PCI Express 4.0
  • PCIe Retimer
  • PCIe Redriver
  • PCI Express specification
Aug 30, 2019

Earlier this month, I attended another eventful Flash Memory Summit (FMS) and I am pleased to say that PCI Express® (PCIe®) was around every corner at this year’s event.

  • Standards & Compliance
  • PCIe 6.0
  • PCI Express 6.0
  • PCIe 5.0
  • PCI Express 5.0
  • PCIe 4.0
  • PCI Express 4.0
  • OCP Summit
  • Flash Memory Summit
  • PCIe Storage
  • PCI Express Storage
Jul 26, 2019

This year’s Flash Memory Summit (FMS) is coming up on August 6. As PCI Express technologies continue to evolve and make strides in the industry, PCI-SIG® is excited to highlight our participation in the growth of flash storage.

  • Standards & Compliance
  • PCI-SIG
  • PCIe 6.0
  • PCI Express 6.0
  • PCIe 5.0
  • PCI Express 5.0
  • PCIe 4.0
  • PCI Express 4.0
  • OCP Summit
  • Flash Memory Summit
  • PCIe Storage
  • PCI Express Storage
May 06, 2019

This June 18-19, PCI-SIG and its 800+ member companies return to the Santa Clara Convention Center for the largest member event of the year: the Annual Members Meeting and Developers Conference.

  • Standards & Compliance
  • PCI-SIG
  • PCI Express 5.0
  • PCI Express 4.0
  • PCIe 5.0
  • PCIe 4.0
Apr 19, 2019

PCI-SIG has built its reputation on delivering high quality PCI Express® (PCIe) specifications that have doubled bandwidth on average every three years, while maintaining full backwards compatibility with prior generations.

  • Signal Integrity
  • PCIe Lane Margining
  • PCIe 4.0
  • PCI Express 4.0
  • PCIe Bandwidth
  • PCIe retimers
  • PCIe Test Equipment
Apr 19, 2019

PCI-SIG has built its reputation on delivering high quality PCI Express® (PCIe) specifications that have doubled bandwidth on average every three years, while maintaining full backwards compatibility with prior generations.

  • Signal Integrity
  • PCIe Lane Margining
  • PCIe 4.0
  • PCI Express 4.0
  • PCIe Bandwidth
  • PCIe retimers
  • PCIe Test Equipment
Apr 03, 2019

his year, I was lucky enough to be able to attend and present at the Open Compute Project Summit and though it has come and gone by now, I’m already looking forward to the next one! 

  • Systems & Applications
  • PCI-SIG
  • PCIe 4.0
  • PCI Express 4.0
  • Open Compute Project Summit
  • PCIe 5.0
  • PCI Express 5.0
Aug 24, 2018

PCI Express® – also known as PCIe – used to get a bad rap for being power hungry on servers and PCs. But I’m happy to say that this is no longer the case. Are you aware that PCIe today is extremely power efficient with built-in low power features?

  • Systems & Applications
  • PCI-SIG
  • PCI Express 3.0
  • PCIe 3.0
  • PCIe Latency
  • PCIe low power
Jun 18, 2018

Whew, what a week! That’s another PCI-SIG Developers Conference in the books though.

  • Standards & Compliance
  • PCI-SIG
  • PCI Express 4.0
  • PCIe 4.0
  • PCI Express 5.0
  • PCIe 5.0
Apr 25, 2018

I recently attended the OCP Summit for the first time and I was impressed by the size of this growing event. The San Jose Convention Center was packed with industry experts – all eager to discuss how to move the Open Compute Project (OPC) forward.

  • Systems & Applications
  • PCI-SIG
  • OCP Summit
  • Open Compute Project
  • PCIe 4.0
  • PCI Express 4.0
Apr 25, 2018

I recently attended the OCP Summit for the first time and I was impressed by the size of this growing event. The San Jose Convention Center was packed with industry experts – all eager to discuss how to move the Open Compute Project (OPC) forward.

  • Systems & Applications
  • PCI-SIG
  • OCP Summit
  • Open Compute Project
  • PCIe 4.0
  • PCI Express 4.0