Latest Posts

Jun 05, 2021

Mohiuddin Mazumder of Intel was honored at this year’s PCI-SIG US DevCon

  • Developers Conference
  • PCI-SIG DevCon
  • PCI-SIG
  • PCI Express
Jun 05, 2021

Manisha Nilange of Intel was honored at this year’s PCI-SIG US DevCon

  • Developers Conference
  • PCI-SIG DevCon
  • PCI-SIG
  • PCI Express
Apr 09, 2021

With global health and safety concerns related to the Covid-19 pandemic still greatly limiting in-person events in 2021, PCI-SIG® continues to offer compliance workshop opportunities to our members virtually.

  • Standards & Compliance
  • PCIe 6.0 specification
  • PAM4 signaling
  • PCIe 6.0 architecture
  • PCIe form factor
  • FLIT Mode
  • PCIe FEC
Jun 11, 2020

PCI Express® (PCIe®) technology is the most important high-speed serial bus in servers. Due to its high bandwidth and low latency characteristics, PCI Express architecture is widely used in various server interconnect scenarios, such as:

  • Signal Integrity
  • PCIe 5.0
  • PCI Express 5.0
  • PCIe CEM
  • PCIe Channel Loss
Feb 27, 2020

At this year’s Open Compute Project Global Summit in San Jose on March 4 -5, attendees will have the opportunity to learn how PCI Express® (PCIe®) specifications enable OCP systems today and how newer versions of

  • Systems & Applications
  • PCIe 6.0
  • PCI Express 6.0
  • PCIe 5.0
  • PCI Express 5.0
  • PCIe 4.0
  • PCI Express 4.0
  • OCP Summit
  • Open Compute Project
Apr 19, 2019

PCI-SIG has built its reputation on delivering high quality PCI Express® (PCIe) specifications that have doubled bandwidth on average every three years, while maintaining full backwards compatibility with prior generations.

  • Signal Integrity
  • PCIe Lane Margining
  • PCIe 4.0
  • PCI Express 4.0
  • PCIe Bandwidth
  • PCIe retimers
  • PCIe Test Equipment
Dec 19, 2018

I’m happy to share that 2018 has been another productive year for PCI-SIG. In addition to significant progress in our specification development and compliance work, we also continued to provide educational resources to our members and the industry.

  • Standards & Compliance
  • PCI-SIG
  • PCIe 5.0
  • PCI Express 5.0
  • OCP Summit
  • Flash Memory Summit
  • Developers Conference
Oct 04, 2018

By now, you probably know about the PCI-SIG Developers Conference which we hold in Santa Clara each year – a free event for our 750+ member companies with four tracks of presentations over two days.

  • Standards & Compliance
  • Technology
  • PCI Express
  • PCI-SIG
  • Compliance
  • Developers Conference
May 13, 2018

Press conference on June 5 to announce PCIe 5.0 spec updates

  • Standards & Compliance
  • PCI Express 5.0
  • PCI-SIG
  • PCIe 5.0
  • Developers Conference
  • Specification
Apr 25, 2018

I recently attended the OCP Summit for the first time and I was impressed by the size of this growing event. The San Jose Convention Center was packed with industry experts – all eager to discuss how to move the Open Compute Project (OPC) forward.

  • Systems & Applications
  • PCI-SIG
  • OCP Summit
  • Open Compute Project
  • PCIe 4.0
  • PCI Express 4.0