In 2022, PCI-SIG® introduced PCI Express® (PCIe®) 5.0 Compliance Testing to members. PCIe 5.0 specification official testing includes a maximum link speed of 32 GT/s.

The PCI-SIG® Developers Conference returned to Taipei, Taiwan for the first time since 2019 on Feb. 20-21 at the Taipei Marriott Hotel. With 674 total attendees, it was the highest-ever turnout for a DevCon.

Around the World with PCI-SIG: Join Us at the 2022 International DevCons

By Richard Solomon, PCI-SIG Vice President and Developers Conference Chair

PCI Express^® (PCIe^®) technology is the most important high-speed serial bus in servers. Due to its high bandwidth and low latency characteristics, PCI Express architecture is widely used in various server interconnect scenarios, such as:

The first installment of the PCI-SIG^® educational webinar series, “Retimers to the Rescue: PCI Express^® Specifications Reach Their Full Potential” premiered on October 9, 2019.

Retimers and redrivers have enabled longer physical channels in servers and storage systems since Peripheral Component Interface Express (PCIe^®) 3.0 specification was first introduced almost 10 years ago.