Latest Posts
The “Meet the PCI-SIG® Members” blog series is a way to highlight our diverse global membership that makes PCI-SIG what it is today. PCI-SIG members help to advance and promote PCI Express® (PCIe®) technology innovation in the industry, while receiving a variety of benefits.
- PCI-SIG Membership
- Member Spotlight
- PCI Express
- PCI-SIG
- PCI-SIG Membership
- PCIe
- PCIe Technology
As the complexity of computer workloads in the automotive market increase, so does the sophistication of computers in vehicles, along with the interconnect performance requirements. A unique emerging challenge is Automotive Functional Safety (FuSA).
- Systems & Applications
- automotive
- PCI Express
- PCIe Specification
- PCIe 5.0
- PCIe 6.0
As the complexity of computer workloads in the automotive market increase, so does the sophistication of computers in vehicles, along with the interconnect performance requirements. A unique emerging challenge is Automotive Functional Safety (FuSA).
- Systems & Applications
- automotive
- PCI Express
- PCIe Specification
- PCIe 5.0
- PCIe 6.0
PCI-SIG® is excited to invite members back to our annual PCI-SIG U.S. Developers Conference (DevCon) in the Santa Clara Convention Center in Santa Clara, CA from June 13-14.
- PCI-SIG Membership
- Developers Conference
- PCI-SIG DevCon
- PCI-SIG
- PCI-SIG Membership
In early 2022, PCI-SIG® released the full version of the PCI Express® (PCIe®) 6.0 specification.
- Systems & Applications
- PCIe 6.0
- PAM4
- PAM4 signaling
- PCI Express 6.0
- PCI Express 6.0 Specification
- PCIe 6.0 architecture
PCI-SIG® in 2022: A Year to Celebrate
By Mihaela Erler and Scott Knowlton, PCI-SIG MWG Co-Chairs
- Standards and Compliance
- PCI-SIG
- PCIe
- PCIe 6.0
- PCIe 7.0
- PCI-SIG DevCon
Around the World with PCI-SIG: Join Us at the 2022 International DevCons
By Richard Solomon, PCI-SIG Vice President and Developers Conference Chair
- Standards and Compliance
- Developers Conference
- PCI-SIG DevCon
- PCI-SIG
- PCI-SIG Membership
By Scott Knowlton and Mihaela Erler, PCI-SIG MWG Co-Chairs
- Standards & Compliance
- Developers Conference
- PCI-SIG DevCon
- PCI-SIG
- PCI-SIG Membership
The PCI-SIG® Board of Directors honored three individuals for their years of service and contributions to the development and expansion of PCI Express® (PCIe®) technology during the PCI-SIG US DevCon 2022 on June 21-22 in
- Standards & Compliance
- Developers Conference
- PCI-SIG DevCon
- PCI-SIG
- PCI-SIG Membership
During the PCI-SIG® US DevCon 2022, the PCI-SIG Board of Directors surprised two individuals for their years of service and contributions to the development and expansion of PCI Express® (PCIe®) technology.
- Standards & Compliance
- Developers Conference
- PCI-SIG DevCon
- PCIe 6.0
- PCI Express 6.0
- PCI Express specification
Following the release of the PCI Express® (PCIe®) 6.0 specification to members earlier this year, PCI-SIG® had the unique opportunity to participate in three IT industry podcasts.
- PCI Express 6.0
- PCI Express 6.0 Specification
- PCIe 6.0 specification
- PCIe 6.0 architecture
- PCI-SIG Compliance
- PCI-SIG Membership
Introduction
- Standards & Compliance
- PCIe 6.0
- PCI Express 6.0
- PAM4
- PCIe Storage
- PCI Express specification
- FLIT
- Forward Error Correct
For nearly three decades, PCI Express® (PCIe®) technology has served as the de facto high bandwidth, low latency interconnect. As the industry evolves to meet the needs of data-intensive applications, the PCIe specification has kept pace, enabling future innovation.
- Standards & Compliance
- PCIe 6.0
- PCI Express 6.0
- PAM4
- PCIe Storage
- PCI Express specification
- FLIT
- Forward Error Correct
We are pleased to commence 2022 on a high note with the official release of the PCI Express® (PCIe®) 6.0 specification to members.
- Standards & Compliance
- PCIe 6.0
- PCI Express 6.0
- PAM4
- PCIe Storage
- PCI Express specification
- FLIT
- Forward Error Correct
Infographic of the PCIe 6.0 Architecture
- Standards & Compliance
- PCIe 6.0
- PCI Express 6.0
- PAM4
- PCIe Storage
- PCI Express specification
- FLIT
- Forward Error Correction
PCI-SIG® Compliance Workshop Updates: Workshop #118 Recap, PCIe 5.0 Specification Workshops and More
PCI-SIG® has continued to host PCI Express® (PCIe®) Compliance Workshops throughout 2021 as we recognize that they are an important member benefit.
- Standards & Compliance
- Compliance
- PCIe 5.0 specification
- PCIe 5.0
- PCI-SIG Integrators List
- PCI Express 5.0
PCI-SIG® built upon our momentum from 2020 with another successful year in 2021. From progress on the PCIe 5.0 architecture compliance program to the impending release of the PCIe 6.0 specification, we have hit many exciting milestones.
- Standards & Compliance
- PCI Express 5.0
- PCI Express 6.0
- PCI Express 6.0 Specification
- PCI Express compliance
- PCI Express specification
- PCI-SIG
- PCI-SIG Compliance
- PCI-SIG Membership
- PCIe 5.0 specification
- PCIe 6.0 specification
I am excited to report that PCI-SIG has released PCIe 6.0 specification, version 0.9 to our members. This is a major milestone in our continued effort to double the data rate of the PCI Express® specifications while maintaining backwards compatibility.
- Standards & Compliance
- PCIe 6.0 specification
- PCIe 6.0
- PAM4
- PCIe FEC
- FLIT
- PCI Express specification
The upcoming PCIe® 6.0 specification introduces Flow Control Unit (FLIT) encoding, which enables the specification to provide low latency with high efficiency. FLIT mode is adopted for the PCIe 6.0 architecture because error correction needs to operate on fixed sized packets.
- PCIe 6.0
- PCI Express 6.0
- PAM4
- PCIe FEC
- Forward Error Correction
- FLIT
As part of our ongoing effort to broaden the adoption and deployment of PCI Express® (PCIe®) technology into diverse industry verticals, the PCI-SIG® Board of Directors recently announced the PCI-SIG Automotive Taskforce.
- Standards & Compliance
- PCI-SIG DevCon
- PCIe 6.0
- automotive
Is your company interested in speaking at PCI-SIG® Virtual Developers Conference 2021? The
- Standards & Compliance
- PCI-SIG DevCon
- PCIe 6.0
- automotive
With the widespread adoption of compute-intensive workloads – such as artificial intelligence and machine learning – in enterprise and cloud data centers, high-speed, low-latency interconnects like PCI Express® architecture are required to connect high-performance nodes.
- Standards & Compliance
- PCIe 4.0
- PCIe 5.0
- PCIe retimers
- PCIe redrivers
- PCIe 5.0 specification
Given the shift to virtual events this year, PCI-SIG® has adapted to a primarily digital world via various online initiatives like educational webinars, blogs and more.
- Systems & Applications
- PCI-SIG DevCon
- PCIe 6.0
The PCI Express® (PCIe®) 6.0 specification will feature two primary mechanisms to correct errors: Forward Error Correction (FEC) and Cyclic Redundancy Check (CRC). Each 256-byte FLIT comprises of 242 bytes of payload which are protected by 8 Bytes of CRC.
- Systems & Applications
- PCIe 6.0
- PCI Express 6.0
- PCIe FEC
The upcoming PCI Express® (PCIe®) 6.0 specification will continue PCI-SIG’s® longstanding history of innovation for the next generation of products to keep up with evolving needs in a wide range of markets.
- Systems & Applications
- PCIe 6.0
- PCI Express 6.0
- PCIe L0p
- PCIe low power state
One of the many new features included in the PCI Express® (PCIe®) specification will be PAM4 (Pulse Amplitude Modulation with 4 levels) signaling.
- Systems & Applications
- PCIe 6.0
- PCI Express 6.0
- What is PAM4
- PAM4
- PCIe FEC
- Forward Error Correction
PCI-SIG® has shifted to virtual events for the 2020 calendar year and our first major members event was the Virtual PCI-SIG Developers Conference.
- Systems & Applications
- PCI-SIG DevCon
- PCIe 5.0
- PCI Express 5.0
- PCIe 4.0
- PCI Express 4.0 PCIe Retimer
- PCI Express Retimer
For almost two decades, the PCI Express® (PCIe®) architecture has offered low latency and high bandwidth in support of next generation systems.
- Systems & Applications
- PCIe 6.0
- PCI Express 6.0
- PAM4
- PCIe FEC
- Forward Error Correction
- FLIT
PCI Express® (PCIe®) technology is the most important high-speed serial bus in servers. Due to its high bandwidth and low latency characteristics, PCI Express architecture is widely used in various server interconnect scenarios, such as:
- Signal Integrity
- PCIe 5.0
- PCI Express 5.0
- PCIe CEM
- PCIe Channel Loss
Before the emergence of autonomous driving, our cars provided isolation from the outside world. We could move from point A to point B with the press of a pedal and a Mapquest print-out in the passenger seat.
- Systems & Applications
- PCIe 6.0
- PCI Express 6.0
- PCIe 5.0
- PCI Express 5.0
- automotive
Before the emergence of autonomous driving, our cars provided isolation from the outside world. We could move from point A to point B with the press of a pedal and a Mapquest print-out in the passenger seat.
- Systems & Applications
- PCIe 6.0
- PCI Express 6.0
- PCIe 5.0
- PCI Express 5.0
- automotive
Each year, over 800 PCI-SIG® member companies are invited to attend the PCI-SIG U.S. Developers Conference.
- Standards & Compliance
- PCIe 6.0
- PCI Express 6.0
- PCI-SIG DevCon
At this year’s Open Compute Project Global Summit in San Jose on March 4 -5, attendees will have the opportunity to learn how PCI Express® (PCIe®) specifications enable OCP systems today and how newer versions of
- Systems & Applications
- PCIe 6.0
- PCI Express 6.0
- PCIe 5.0
- PCI Express 5.0
- PCIe 4.0
- PCI Express 4.0
- OCP Summit
- Open Compute Project
At this year’s Open Compute Project Global Summit in San Jose on March 4 -5, attendees will have the opportunity to learn how PCI Express® (PCIe®) specifications enable OCP systems today and how newer versions of
- Systems & Applications
- PCIe 6.0
- PCI Express 6.0
- PCIe 5.0
- PCI Express 5.0
- PCIe 4.0
- PCI Express 4.0
- OCP Summit
- Open Compute Project
We are starting 2020 with the release of version 0.5 of the PCI Express® (PCIe®) 6.0 specification incorporating the significant member feedback received on version 0.3.
- Standards & Compliance
- PCIe 6.0
- PCI Express 6.0
- PAM4
- PCIe FEC
- Forward Error Correction
- FLIT
- PCI Express specification
As I look back on 2019, I’m proud to report that it has been a banner year for PCI-SIG®.
- Systems & Applications
- PCIe 6.0
- PCI Express 6.0
- PCIe 5.0
- PCI Express 5.0
- OCP Summit
- Flash Memory Summit
As I look back on 2019, I’m proud to report that it has been a banner year for PCI-SIG®.
- Systems & Applications
- PCIe 6.0
- PCI Express 6.0
- PCIe 5.0
- PCI Express 5.0
- OCP Summit
- Flash Memory Summit
According to Tractica, Artificial Intelligence (AI) and Machine Learning (ML) markets are set to grow to $118.6 billion by 2025—as these new technologies are becoming the heart of our digital lives.
- Systems & Applications
- PCIe 5.0
- PCI Express 5.0
- PCIe Bandwidth
Our PCI-SIG® members have been hard at work. In 2017, we delivered PCI Express® 4.0 with its 16 GT/s, while also diving headfirst into PCI Express 5.0 development – first announced at our annual PCI-SIG DevCon in June 2017.
- Standards & Compliance
- PCI-SIG
- PCIe 5.0
- PCI Express 5.0
- PCIe Bandwidth
From Israel to Europe and Japan to Taiwan, the PCI-SIG® Israel, Europe and APAC 2019 Developers Conference tour has come to an end for the year.
- Standards & Compliance
- PCI-SIG DevCon
- PCIe 6.0
- PCI Express 560
- PCIe 5.0
- PCI Express 5.0
- PCI Express compliance
- PCI-SIG Integrator's List
From Israel to Europe and Japan to Taiwan, the PCI-SIG® Israel, Europe and APAC 2019 Developers Conference tour has come to an end for the year.
- Standards & Compliance
- PCI-SIG DevCon
- PCIe 6.0
- PCI Express 560
- PCIe 5.0
- PCI Express 5.0
- PCI Express compliance
- PCI-SIG Integrator's List
PCI-SIG® has enabled PCI Express® (PCIe®) technology to be cost-effective and easy to implement by supporting multiple form factors for a variety of applications.
- Physical Form Factors
- PCIe 5.0
- PCI Express 5.0
- PCIe CEM
- PCIe Card Electromechanical Connector
The first installment of the PCI-SIG® educational webinar series, “Retimers to the Rescue: PCI Express® Specifications Reach Their Full Potential” premiered on October 9, 2019.
- Signal Integrity
- PCIe 5.0
- PCI Express 5.0
- PCIe Retimer
- PCIe Redriver
- Physical Form Factors
- PCIe 6.0
- PCI Express 6.0
- PCIe PAM4
- PCIe FEC
- PCIe Forward Error Correction
- PCIe 6.0 specification
- PCI Express 6.0 Specification
Retimers and redrivers have enabled longer physical channels in servers and storage systems since Peripheral Component Interface Express (PCIe®) 3.0 specification was first introduced almost 10 years ago.
- Signal Integrity
- PCIe 5.0
- PCI Express 5.0
- PCIe 4.0
- PCI Express 4.0
- PCIe Retimer
- PCIe Redriver
- PCI Express specification
Earlier this month, I attended another eventful Flash Memory Summit (FMS) and I am pleased to say that PCI Express® (PCIe®) was around every corner at this year’s event.
- Standards & Compliance
- PCIe 6.0
- PCI Express 6.0
- PCIe 5.0
- PCI Express 5.0
- PCIe 4.0
- PCI Express 4.0
- OCP Summit
- Flash Memory Summit
- PCIe Storage
- PCI Express Storage
Earlier this month, I attended another eventful Flash Memory Summit (FMS) and I am pleased to say that PCI Express® (PCIe®) was around every corner at this year’s event.
- Standards & Compliance
- PCIe 6.0
- PCI Express 6.0
- PCIe 5.0
- PCI Express 5.0
- PCIe 4.0
- PCI Express 4.0
- OCP Summit
- Flash Memory Summit
- PCIe Storage
- PCI Express Storage
This year’s Flash Memory Summit (FMS) is coming up on August 6. As PCI Express technologies continue to evolve and make strides in the industry, PCI-SIG® is excited to highlight our participation in the growth of flash storage.
- Standards & Compliance
- PCI-SIG
- PCIe 6.0
- PCI Express 6.0
- PCIe 5.0
- PCI Express 5.0
- PCIe 4.0
- PCI Express 4.0
- OCP Summit
- Flash Memory Summit
- PCIe Storage
- PCI Express Storage
This year’s Flash Memory Summit (FMS) is coming up on August 6. As PCI Express technologies continue to evolve and make strides in the industry, PCI-SIG® is excited to highlight our participation in the growth of flash storage.
- Standards & Compliance
- PCI-SIG
- PCIe 6.0
- PCI Express 6.0
- PCIe 5.0
- PCI Express 5.0
- PCIe 4.0
- PCI Express 4.0
- OCP Summit
- Flash Memory Summit
- PCIe Storage
- PCI Express Storage
Another PCI-SIG Developers Conference has come and gone, and we had a whopping 600+ member company attendees at this year’s event in Santa Clara.
- Standards & Compliance
- PCI-SIG
- PCI-SIG DevCon
- PCIe 6.0
- PCI Express 6.0
- PCIe 5.0
- PCI Express 5.0
Another PCI-SIG Developers Conference has come and gone, and we had a whopping 600+ member company attendees at this year’s event in Santa Clara.
- Standards & Compliance
- PCI-SIG
- PCI-SIG DevCon
- PCIe 6.0
- PCI Express 6.0
- PCIe 5.0
- PCI Express 5.0
I am happy to share that PCI-SIG® has begun developing the PCI Express® (PCIe®) 6.0 specification, targeted for release in 2021.
- Systems & Applications
- PCIe 6.0
- PCI Express 6.0
- PCIe PAM4
- PCIe FEC
- PCIe Forward Error Correction
- PCIe 6.0 specification
- PCI Express 6.0 Specification
- PCI Express PAM4
- PCIe 6.0 FEC
- PCI Express 6.0 FEC
- PCIe6.0 Forward Error Correction
- PCI Express 6.0 Forward Error Correction
I am pleased to announce that PCI Express® 5.0 specification, Version 1.0— reaching 32GT/s transfer rates—has been released to our members in less than 2 years.
- Systems & Applications
- PCI-SIG
- PCIe 5.0
- PCI Express 5.0
- PCI-SIG Membership
I am pleased to announce that PCI Express® 5.0 specification, Version 1.0— reaching 32GT/s transfer rates—has been released to our members in less than 2 years.
- Systems & Applications
- PCI-SIG
- PCIe 5.0
- PCI Express 5.0
- PCI-SIG Membership
This June 18-19, PCI-SIG and its 800+ member companies return to the Santa Clara Convention Center for the largest member event of the year: the Annual Members Meeting and Developers Conference.
- Standards & Compliance
- PCI-SIG
- PCI Express 5.0
- PCI Express 4.0
- PCIe 5.0
- PCIe 4.0
his year, I was lucky enough to be able to attend and present at the Open Compute Project Summit and though it has come and gone by now, I’m already looking forward to the next one!
- Systems & Applications
- PCI-SIG
- PCIe 4.0
- PCI Express 4.0
- Open Compute Project Summit
- PCIe 5.0
- PCI Express 5.0
This is already shaping up to be a busy year for PCI-SIG® with the pending release of the PCI Express® 5.0 specification targete
- Standards & Compliance
- PCIe 5.0
- PCI Express 5.0
- Embedded World
- SD Association
- OCP Global Summit
I’m happy to share that 2018 has been another productive year for PCI-SIG. In addition to significant progress in our specification development and compliance work, we also continued to provide educational resources to our members and the industry.
- Standards & Compliance
- PCI-SIG
- PCIe 5.0
- PCI Express 5.0
- OCP Summit
- Flash Memory Summit
- Developers Conference
Our PCI-SIG® members have been hard at work. In 2017, we delivered PCI Express® 4.0 with its 16 GT/s, while also diving headfirst into PCI Express 5.0 development – first announced at our annual PCI-SIG DevCon in June 2017.
- Standards & Compliance
- PCI-SIG
- PCIe 5.0
- PCI Express 5.0
- PCIe Bandwidth
Whew, what a week! That’s another PCI-SIG Developers Conference in the books though.
- Standards & Compliance
- PCI-SIG
- PCI Express 4.0
- PCIe 4.0
- PCI Express 5.0
- PCIe 5.0
After successfully releasing PCIe® 4.0 Specification Version 1.0 last October, the members of the PCI-SIG® have been heads down and hard at work to ensure PCIe 5.0 specification is made a reality by 2019.
- Standards & Compliance
- PCI Express
- PCI-SIG
- PCIe 5.0
- PCI Express 5.0
Press conference on June 5 to announce PCIe 5.0 spec updates
- Standards & Compliance
- PCI Express 5.0
- PCI-SIG
- PCIe 5.0
- Developers Conference
- Specification
I’m pleased to share that PCI-SIG has released the PCIe 4.0 Specification Version 1.0 and it is now available for download on our website.
- Standards & Compliance
- PCIe 5.0
- PCI Express 5.0
- PCI Expres 4.0
- PCIe 4.0
- PCI-SIG