Latest Posts

Oct 06, 2021

I am excited to report that PCI-SIG has released PCIe 6.0 specification, version 0.9 to our members. This is a major milestone in our continued effort to double the data rate of the PCI Express® specifications while maintaining backwards compatibility.

  • Standards & Compliance
  • PCIe 6.0 specification
  • PCIe 6.0
  • PAM4
  • PCIe FEC
  • FLIT
  • PCI Express specification
Aug 19, 2021

The upcoming PCIe® 6.0 specification introduces Flow Control Unit (FLIT) encoding, which enables the specification to provide low latency with high efficiency. FLIT mode is adopted for the PCIe 6.0 architecture because error correction needs to operate on fixed sized packets.

  • PCIe 6.0
  • PCI Express 6.0
  • PAM4
  • PCIe FEC
  • Forward Error Correction
  • FLIT
Jun 05, 2021

Mohiuddin Mazumder of Intel was honored at this year’s PCI-SIG US DevCon

  • Developers Conference
  • PCI-SIG DevCon
  • PCI-SIG
  • PCI Express
Jun 05, 2021

Manisha Nilange of Intel was honored at this year’s PCI-SIG US DevCon

  • Developers Conference
  • PCI-SIG DevCon
  • PCI-SIG
  • PCI Express
Aug 30, 2020

The upcoming PCI Express® (PCIe®) 6.0 specification will continue PCI-SIG’s® longstanding history of innovation for the next generation of products to keep up with evolving needs in a wide range of markets.

  • Systems & Applications
  • PCIe 6.0
  • PCI Express 6.0
  • PCIe L0p
  • PCIe low power state
Jun 22, 2020

For almost two decades, the PCI Express® (PCIe®) architecture has offered low latency and high bandwidth in support of next generation systems.

  • Systems & Applications
  • PCIe 6.0
  • PCI Express 6.0
  • PAM4
  • PCIe FEC
  • Forward Error Correction
  • FLIT
Feb 19, 2020

We are starting 2020 with the release of version 0.5 of the PCI Express® (PCIe®) 6.0 specification incorporating the significant member feedback received on version 0.3.

  • Standards & Compliance
  • PCIe 6.0
  • PCI Express 6.0
  • PAM4
  • PCIe FEC
  • Forward Error Correction
  • FLIT
  • PCI Express specification
Jun 19, 2019

I am happy to share that PCI-SIG® has begun developing the PCI Express® (PCIe®) 6.0 specification, targeted for release in 2021.

  • Systems & Applications
  • PCIe 6.0
  • PCI Express 6.0
  • PCIe PAM4
  • PCIe FEC
  • PCIe Forward Error Correction
  • PCIe 6.0 specification
  • PCI Express 6.0 Specification
  • PCI Express PAM4
  • PCIe 6.0 FEC
  • PCI Express 6.0 FEC
  • PCIe6.0 Forward Error Correction
  • PCI Express 6.0 Forward Error Correction
Jun 19, 2019

I am happy to share that PCI-SIG® has begun developing the PCI Express® (PCIe®) 6.0 specification, targeted for release in 2021.

  • Systems & Applications
  • PCIe 6.0
  • PCI Express 6.0
  • PCIe PAM4
  • PCIe FEC
  • PCIe Forward Error Correction
  • PCIe 6.0 specification
  • PCI Express 6.0 Specification
  • PCI Express PAM4
  • PCIe 6.0 FEC
  • PCI Express 6.0 FEC
  • PCIe6.0 Forward Error Correction
  • PCI Express 6.0 Forward Error Correction
Dec 19, 2018

I’m happy to share that 2018 has been another productive year for PCI-SIG. In addition to significant progress in our specification development and compliance work, we also continued to provide educational resources to our members and the industry.

  • Standards & Compliance
  • PCI-SIG
  • PCIe 5.0
  • PCI Express 5.0
  • OCP Summit
  • Flash Memory Summit
  • Developers Conference
Oct 04, 2018

By now, you probably know about the PCI-SIG Developers Conference which we hold in Santa Clara each year – a free event for our 750+ member companies with four tracks of presentations over two days.

  • Standards & Compliance
  • Technology
  • PCI Express
  • PCI-SIG
  • Compliance
  • Developers Conference
May 13, 2018

Press conference on June 5 to announce PCIe 5.0 spec updates

  • Standards & Compliance
  • PCI Express 5.0
  • PCI-SIG
  • PCIe 5.0
  • Developers Conference
  • Specification