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Nov 28, 2023

Author’s Note: This blog discusses new functionality introduced in the PCIe 6.0 specification, but please note that subsequent revisions have been published. Developers should always work from the latest revision to ensure they see all specification errata.

  • PCI Express Specification
  • PCI Express 6.0 Specification
  • PCIe 6.0 specification
  • PCI Express 6.0
  • PCIe 6.0 FEC
  • PCIe PAM4
  • PCIe L0p
  • PCIe low power
Sep 19, 2023

Author’s Note: This blog discusses new functionality introduced in the PCIe 6.0 specification, but please note that the PCIe 6.0.1 and PCIe 6.1 specification revisions have been published.

  • PCI Express Specification
  • PCI Express 6.0 Specification
  • PCIe 6.0 specification
  • PCI Express 6.0
  • PCI Express 6.0 Forward Error Correction
  • PCIe 6.0 FEC
  • FLIT Mode
Sep 19, 2023

Author’s Note: This blog discusses new functionality introduced in the PCIe 6.0 specification, but please note that the PCIe 6.0.1 and PCIe 6.1 specification revisions have been published.

  • PCI Express Specification
  • PCI Express 6.0 Specification
  • PCIe 6.0 specification
  • PCI Express 6.0
  • PCI Express 6.0 Forward Error Correction
  • PCIe 6.0 FEC
  • FLIT Mode
Jan 11, 2022

Infographic of the PCIe 6.0 Architecture

  • Standards & Compliance
  • PCIe 6.0
  • PCI Express 6.0
  • PAM4
  • PCIe Storage
  • PCI Express specification
  • FLIT
  • Forward Error Correction
Aug 25, 2021

With the emergence of autonomous vehicles, AI-based advanced driver assistance systems (ADAS) and in-vehicle infotainment (IVI), today’s automobiles are becoming high-tech “servers on wheels.” PCI Express® (PCIe®) technology is expanding to become the interconnect of choice in automotive applicat

  • Systems & Applications
  • automotive
  • PCIe
  • PCI Express
  • PCIe Retimer
  • PCIe connectivity
  • PCIe CEM
  • PCIe Security
  • PCIe low power
  • PCI-SIG Automotive Taskforce.
Aug 19, 2021

The upcoming PCIe® 6.0 specification introduces Flow Control Unit (FLIT) encoding, which enables the specification to provide low latency with high efficiency. FLIT mode is adopted for the PCIe 6.0 architecture because error correction needs to operate on fixed sized packets.

  • PCIe 6.0
  • PCI Express 6.0
  • PAM4
  • PCIe FEC
  • Forward Error Correction
  • FLIT
Jul 16, 2021

By: Hope Bovenzi, Strategic Marketing, Astera Labs

  • Signal Integrity
  • automotive
  • PCIe
  • PCI Express
  • PCIe Storage
  • PCIe Retimer
  • PCIe connectivity
  • PCIe Bandwidth
  • PCI-SIG Automotive Taskforce
Apr 09, 2021

With global health and safety concerns related to the Covid-19 pandemic still greatly limiting in-person events in 2021, PCI-SIG® continues to offer compliance workshop opportunities to our members virtually.

  • Standards & Compliance
  • PCIe 6.0 specification
  • PAM4 signaling
  • PCIe 6.0 architecture
  • PCIe form factor
  • FLIT Mode
  • PCIe FEC
Aug 11, 2020

One of the many new features included in the PCI Express® (PCIe®) specification will be PAM4 (Pulse Amplitude Modulation with 4 levels) signaling.

  • Systems & Applications
  • PCIe 6.0
  • PCI Express 6.0
  • What is PAM4
  • PAM4
  • PCIe FEC
  • Forward Error Correction
Jun 22, 2020

For almost two decades, the PCI Express® (PCIe®) architecture has offered low latency and high bandwidth in support of next generation systems.

  • Systems & Applications
  • PCIe 6.0
  • PCI Express 6.0
  • PAM4
  • PCIe FEC
  • Forward Error Correction
  • FLIT

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