Latest Posts

Jun 05, 2021

Mohiuddin Mazumder of Intel was honored at this year’s PCI-SIG US DevCon

  • Developers Conference
  • PCI-SIG DevCon
  • PCI-SIG
  • PCI Express
Jun 05, 2021

Manisha Nilange of Intel was honored at this year’s PCI-SIG US DevCon

  • Developers Conference
  • PCI-SIG DevCon
  • PCI-SIG
  • PCI Express
Feb 21, 2021

As part of our ongoing effort to broaden the adoption and deployment of PCI Express® (PCIe®) technology into diverse industry verticals, the PCI-SIG® Board of Directors recently announced the PCI-SIG Automotive Taskforce.

  • Standards & Compliance
  • PCI-SIG DevCon
  • PCIe 6.0
  • automotive
Feb 11, 2021

Is your company interested in speaking at PCI-SIG® Virtual Developers Conference 2021? The 

  • Standards & Compliance
  • PCI-SIG DevCon
  • PCIe 6.0
  • automotive
Oct 16, 2020

Given the shift to virtual events this year, PCI-SIG® has adapted to a primarily digital world via various online initiatives like educational webinarsblogs and more.

  • Systems & Applications
  • PCI-SIG DevCon
  • PCIe 6.0
Sep 28, 2020

The PCI Express® (PCIe®) 6.0 specification will feature two primary mechanisms to correct errors: Forward Error Correction (FEC) and Cyclic Redundancy Check (CRC). Each 256-byte FLIT comprises of 242 bytes of payload which are protected by 8 Bytes of CRC.

  • Systems & Applications
  • PCIe 6.0
  • PCI Express 6.0
  • PCIe FEC
Aug 30, 2020

The upcoming PCI Express® (PCIe®) 6.0 specification will continue PCI-SIG’s® longstanding history of innovation for the next generation of products to keep up with evolving needs in a wide range of markets.

  • Systems & Applications
  • PCIe 6.0
  • PCI Express 6.0
  • PCIe L0p
  • PCIe low power state
Aug 11, 2020

One of the many new features included in the PCI Express® (PCIe®) specification will be PAM4 (Pulse Amplitude Modulation with 4 levels) signaling.

  • Systems & Applications
  • PCIe 6.0
  • PCI Express 6.0
  • What is PAM4
  • PAM4
  • PCIe FEC
  • Forward Error Correction
Jun 22, 2020

For almost two decades, the PCI Express® (PCIe®) architecture has offered low latency and high bandwidth in support of next generation systems.

  • Systems & Applications
  • PCIe 6.0
  • PCI Express 6.0
  • PAM4
  • PCIe FEC
  • Forward Error Correction
  • FLIT
Jun 03, 2020

Before the emergence of autonomous driving, our cars provided isolation from the outside world. We could move from point A to point B with the press of a pedal and a Mapquest print-out in the passenger seat.

  • Systems & Applications
  • PCIe 6.0
  • PCI Express 6.0
  • PCIe 5.0
  • PCI Express 5.0
  • automotive
Apr 03, 2020

Each year, over 800 PCI-SIG® member companies are invited to attend the PCI-SIG U.S. Developers Conference.

  • Standards & Compliance
  • PCIe 6.0
  • PCI Express 6.0
  • PCI-SIG DevCon
Feb 27, 2020

At this year’s Open Compute Project Global Summit in San Jose on March 4 -5, attendees will have the opportunity to learn how PCI Express® (PCIe®) specifications enable OCP systems today and how newer versions of

  • Systems & Applications
  • PCIe 6.0
  • PCI Express 6.0
  • PCIe 5.0
  • PCI Express 5.0
  • PCIe 4.0
  • PCI Express 4.0
  • OCP Summit
  • Open Compute Project
Feb 19, 2020

We are starting 2020 with the release of version 0.5 of the PCI Express® (PCIe®) 6.0 specification incorporating the significant member feedback received on version 0.3.

  • Standards & Compliance
  • PCIe 6.0
  • PCI Express 6.0
  • PAM4
  • PCIe FEC
  • Forward Error Correction
  • FLIT
  • PCI Express specification
Dec 19, 2019

As I look back on 2019, I’m proud to report that it has been a banner year for PCI-SIG®.

  • Systems & Applications
  • PCIe 6.0
  • PCI Express 6.0
  • PCIe 5.0
  • PCI Express 5.0
  • OCP Summit
  • Flash Memory Summit
Dec 07, 2019

Our PCI-SIG® members have been hard at work. In 2017, we delivered PCI Express® 4.0 with its 16 GT/s, while also diving headfirst into PCI Express 5.0 development – first announced at our annual PCI-SIG DevCon in June 2017.

  • Standards & Compliance
  • PCI-SIG
  • PCIe 5.0
  • PCI Express 5.0
  • PCIe Bandwidth
Nov 25, 2019

From Israel to Europe and Japan to Taiwan, the PCI-SIG® Israel, Europe and APAC 2019 Developers Conference tour has come to an end for the year.

  • Standards & Compliance
  • PCI-SIG DevCon
  • PCIe 6.0
  • PCI Express 560
  • PCIe 5.0
  • PCI Express 5.0
  • PCI Express compliance
  • PCI-SIG Integrator's List
Oct 14, 2019

I’m pleased to share that PCI-SIG® continues to make great progress on the development of our next generation of PCIe® technology – the 

  • Physical Form Factors
  • PCIe 6.0
  • PCI Express 6.0
  • PCIe PAM4
  • PCIe FEC
  • PCIe Forward Error Correction
  • PCIe 6.0 specification
  • PCI Express 6.0 Specification
Aug 30, 2019

Earlier this month, I attended another eventful Flash Memory Summit (FMS) and I am pleased to say that PCI Express® (PCIe®) was around every corner at this year’s event.

  • Standards & Compliance
  • PCIe 6.0
  • PCI Express 6.0
  • PCIe 5.0
  • PCI Express 5.0
  • PCIe 4.0
  • PCI Express 4.0
  • OCP Summit
  • Flash Memory Summit
  • PCIe Storage
  • PCI Express Storage
Jul 26, 2019

This year’s Flash Memory Summit (FMS) is coming up on August 6. As PCI Express technologies continue to evolve and make strides in the industry, PCI-SIG® is excited to highlight our participation in the growth of flash storage.

  • Standards & Compliance
  • PCI-SIG
  • PCIe 6.0
  • PCI Express 6.0
  • PCIe 5.0
  • PCI Express 5.0
  • PCIe 4.0
  • PCI Express 4.0
  • OCP Summit
  • Flash Memory Summit
  • PCIe Storage
  • PCI Express Storage
Jul 26, 2019

This year’s Flash Memory Summit (FMS) is coming up on August 6. As PCI Express technologies continue to evolve and make strides in the industry, PCI-SIG® is excited to highlight our participation in the growth of flash storage.

  • Standards & Compliance
  • PCI-SIG
  • PCIe 6.0
  • PCI Express 6.0
  • PCIe 5.0
  • PCI Express 5.0
  • PCIe 4.0
  • PCI Express 4.0
  • OCP Summit
  • Flash Memory Summit
  • PCIe Storage
  • PCI Express Storage
Jul 23, 2019

The SD Association (SDA) recently announced SD Express, which adds the PCI Express® and NVMe™ interfaces to the SD interface. The PCIe® interface delivers transfer rates up to 985 megabytes per second (MB/s) and supports backward compatibility with existing SD hosts.

  • Standards & Compliance
  • PCI-SIG
  • SD Association
  • SD Express
  • NVMe
  • PCIe 3.0
  • PCI Express 3.0
Jul 12, 2019

Another PCI-SIG Developers Conference has come and gone, and we had a whopping 600+ member company attendees at this year’s event in Santa Clara.

  • Standards & Compliance
  • PCI-SIG
  • PCI-SIG DevCon
  • PCIe 6.0
  • PCI Express 6.0
  • PCIe 5.0
  • PCI Express 5.0
Jul 12, 2019

Another PCI-SIG Developers Conference has come and gone, and we had a whopping 600+ member company attendees at this year’s event in Santa Clara.

  • Standards & Compliance
  • PCI-SIG
  • PCI-SIG DevCon
  • PCIe 6.0
  • PCI Express 6.0
  • PCIe 5.0
  • PCI Express 5.0
Jun 19, 2019

I am happy to share that PCI-SIG® has begun developing the PCI Express® (PCIe®) 6.0 specification, targeted for release in 2021.

  • Systems & Applications
  • PCIe 6.0
  • PCI Express 6.0
  • PCIe PAM4
  • PCIe FEC
  • PCIe Forward Error Correction
  • PCIe 6.0 specification
  • PCI Express 6.0 Specification
  • PCI Express PAM4
  • PCIe 6.0 FEC
  • PCI Express 6.0 FEC
  • PCIe6.0 Forward Error Correction
  • PCI Express 6.0 Forward Error Correction
May 19, 2019

I am pleased to announce that PCI Express® 5.0 specification, Version 1.0— reaching 32GT/s transfer rates—has been released to our members in less than 2 years.

  • Systems & Applications
  • PCI-SIG
  • PCIe 5.0
  • PCI Express 5.0
  • PCI-SIG Membership
May 06, 2019

This June 18-19, PCI-SIG and its 800+ member companies return to the Santa Clara Convention Center for the largest member event of the year: the Annual Members Meeting and Developers Conference.

  • Standards & Compliance
  • PCI-SIG
  • PCI Express 5.0
  • PCI Express 4.0
  • PCIe 5.0
  • PCIe 4.0
May 06, 2019

PCI-SIG® is proud to announce that we have established a working relationship with DMTF to simplify hardware management.

  • Standards & Compliance
  • PCIe
  • PCI Express
  • PCI-SIG
  • DMTF
  • Redfish
  • PCIe Security
Apr 03, 2019

his year, I was lucky enough to be able to attend and present at the Open Compute Project Summit and though it has come and gone by now, I’m already looking forward to the next one! 

  • Systems & Applications
  • PCI-SIG
  • PCIe 4.0
  • PCI Express 4.0
  • Open Compute Project Summit
  • PCIe 5.0
  • PCI Express 5.0
Dec 19, 2018

I’m happy to share that 2018 has been another productive year for PCI-SIG. In addition to significant progress in our specification development and compliance work, we also continued to provide educational resources to our members and the industry.

  • Standards & Compliance
  • PCI-SIG
  • PCIe 5.0
  • PCI Express 5.0
  • OCP Summit
  • Flash Memory Summit
  • Developers Conference
Dec 07, 2018

Our PCI-SIG® members have been hard at work. In 2017, we delivered PCI Express® 4.0 with its 16 GT/s, while also diving headfirst into PCI Express 5.0 development – first announced at our annual PCI-SIG DevCon in June 2017.

  • Standards & Compliance
  • PCI-SIG
  • PCIe 5.0
  • PCI Express 5.0
  • PCIe Bandwidth
Nov 08, 2018

The PCI-SIG Serial Enabling Workgroup (called the “SEG” for short) is the PCI-SIG workgroup charged with running the PCI Express® (PCIe®) compliance program.

  • Standards & Compliance
  • PCI-SIG
  • PCI-SIG Compliance
  • PCI-SIG Interoperability
  • PCI-SIG Integrators List
Oct 04, 2018

By now, you probably know about the PCI-SIG Developers Conference which we hold in Santa Clara each year – a free event for our 750+ member companies with four tracks of presentations over two days.

  • Standards & Compliance
  • Technology
  • PCI Express
  • PCI-SIG
  • Compliance
  • Developers Conference
Aug 24, 2018

PCI Express® – also known as PCIe – used to get a bad rap for being power hungry on servers and PCs. But I’m happy to say that this is no longer the case. Are you aware that PCIe today is extremely power efficient with built-in low power features?

  • Systems & Applications
  • PCI-SIG
  • PCI Express 3.0
  • PCIe 3.0
  • PCIe Latency
  • PCIe low power
Jul 31, 2018

I’m looking forward to attending the Flash Memory Summit (FMS) next week in Santa Clara.

  • Standards & Compliance
  • PCI-SIG
  • Flash Memory Summit
  • FMS
  • NVMe
  • Flash Storage
Jun 18, 2018

Whew, what a week! That’s another PCI-SIG Developers Conference in the books though.

  • Standards & Compliance
  • PCI-SIG
  • PCI Express 4.0
  • PCIe 4.0
  • PCI Express 5.0
  • PCIe 5.0
Jun 05, 2018

After successfully releasing PCIe® 4.0 Specification Version 1.0 last October, the members of the PCI-SIG® have been heads down and hard at work to ensure PCIe 5.0 specification is made a reality by 2019.

  • Standards & Compliance
  • PCI Express
  • PCI-SIG
  • PCIe 5.0
  • PCI Express 5.0
May 13, 2018

Press conference on June 5 to announce PCIe 5.0 spec updates

  • Standards & Compliance
  • PCI Express 5.0
  • PCI-SIG
  • PCIe 5.0
  • Developers Conference
  • Specification
Apr 25, 2018

I recently attended the OCP Summit for the first time and I was impressed by the size of this growing event. The San Jose Convention Center was packed with industry experts – all eager to discuss how to move the Open Compute Project (OPC) forward.

  • Systems & Applications
  • PCI-SIG
  • OCP Summit
  • Open Compute Project
  • PCIe 4.0
  • PCI Express 4.0
Oct 24, 2017

I’m pleased to share that PCI-SIG has released the PCIe 4.0 Specification Version 1.0 and it is now available for download on our website.

  • Standards & Compliance
  • PCIe 5.0
  • PCI Express 5.0
  • PCI Expres 4.0
  • PCIe 4.0
  • PCI-SIG