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PCI-SIG® is excited to invite members back to our annual PCI-SIG U.S. Developers Conference (DevCon) in the Santa Clara Convention Center in Santa Clara, CA from June 13-14.
- PCI-SIG Membership
- Developers Conference
- PCI-SIG DevCon
- PCI-SIG
- PCI-SIG Membership

Around the World with PCI-SIG: Join Us at the 2022 International DevCons
By Richard Solomon, PCI-SIG Vice President and Developers Conference Chair
- Standards and Compliance
- Developers Conference
- PCI-SIG DevCon
- PCI-SIG
- PCI-SIG Membership

By Scott Knowlton and Mihaela Erler, PCI-SIG MWG Co-Chairs
- Standards & Compliance
- Developers Conference
- PCI-SIG DevCon
- PCI-SIG
- PCI-SIG Membership

The PCI-SIG® Board of Directors honored three individuals for their years of service and contributions to the development and expansion of PCI Express® (PCIe®) technology during the PCI-SIG US DevCon 2022 on June 21-22 in
- Standards & Compliance
- Developers Conference
- PCI-SIG DevCon
- PCI-SIG
- PCI-SIG Membership

Following the release of the PCI Express® (PCIe®) 6.0 specification to members earlier this year, PCI-SIG® had the unique opportunity to participate in three IT industry podcasts.
- PCI Express 6.0
- PCI Express 6.0 Specification
- PCIe 6.0 specification
- PCIe 6.0 architecture
- PCI-SIG Compliance
- PCI-SIG Membership

PCI-SIG® built upon our momentum from 2020 with another successful year in 2021. From progress on the PCIe 5.0 architecture compliance program to the impending release of the PCIe 6.0 specification, we have hit many exciting milestones.
- Standards & Compliance
- PCI Express 5.0
- PCI Express 6.0
- PCI Express 6.0 Specification
- PCI Express compliance
- PCI Express specification
- PCI-SIG
- PCI-SIG Compliance
- PCI-SIG Membership
- PCIe 5.0 specification
- PCIe 6.0 specification
With global health and safety concerns related to the Covid-19 pandemic still greatly limiting in-person events in 2021, PCI-SIG® continues to offer compliance workshop opportunities to our members virtually.
- Standards & Compliance
- PCIe 6.0 specification
- PAM4 signaling
- PCIe 6.0 architecture
- PCIe form factor
- FLIT Mode
- PCIe FEC
With the widespread adoption of compute-intensive workloads – such as artificial intelligence and machine learning – in enterprise and cloud data centers, high-speed, low-latency interconnects like PCI Express® architecture are required to connect high-performance nodes.
- Standards & Compliance
- PCIe 4.0
- PCIe 5.0
- PCIe retimers
- PCIe redrivers
- PCIe 5.0 specification
Wow, 2020 sure has transformed the ways we connect, learn and innovate in industries around the world, and in our daily lives!
- Standards & Compliance
- PCI Express compliance
- PCI-SIG Integrators List
- PCIe 4.0
- PCIe 3.0
The upcoming PCI Express® (PCIe®) 6.0 specification will continue PCI-SIG’s® longstanding history of innovation for the next generation of products to keep up with evolving needs in a wide range of markets.
- Systems & Applications
- PCIe 6.0
- PCI Express 6.0
- PCIe L0p
- PCIe low power state
PCI-SIG® has shifted to virtual events for the 2020 calendar year and our first major members event was the Virtual PCI-SIG Developers Conference.
- Systems & Applications
- PCI-SIG DevCon
- PCIe 5.0
- PCI Express 5.0
- PCIe 4.0
- PCI Express 4.0 PCIe Retimer
- PCI Express Retimer
At this year’s Open Compute Project Global Summit in San Jose on March 4 -5, attendees will have the opportunity to learn how PCI Express® (PCIe®) specifications enable OCP systems today and how newer versions of
- Systems & Applications
- PCIe 6.0
- PCI Express 6.0
- PCIe 5.0
- PCI Express 5.0
- PCIe 4.0
- PCI Express 4.0
- OCP Summit
- Open Compute Project
The SD Association (SDA) recently announced SD Express, which adds the PCI Express® and NVMe™ interfaces to the SD interface. The PCIe® interface delivers transfer rates up to 985 megabytes per second (MB/s) and supports backward compatibility with existing SD hosts.
- Standards & Compliance
- PCI-SIG
- SD Association
- SD Express
- NVMe
- PCIe 3.0
- PCI Express 3.0
The SD Association (SDA) recently announced SD Express, which adds the PCI Express® and NVMe™ interfaces to the SD interface. The PCIe® interface delivers transfer rates up to 985 megabytes per second (MB/s) and supports backward compatibility with existing SD hosts.
- Standards & Compliance
- PCI-SIG
- SD Association
- SD Express
- NVMe
- PCIe 3.0
- PCI Express 3.0
I am happy to share that PCI-SIG® has begun developing the PCI Express® (PCIe®) 6.0 specification, targeted for release in 2021.
- Systems & Applications
- PCIe 6.0
- PCI Express 6.0
- PCIe PAM4
- PCIe FEC
- PCIe Forward Error Correction
- PCIe 6.0 specification
- PCI Express 6.0 Specification
- PCI Express PAM4
- PCIe 6.0 FEC
- PCI Express 6.0 FEC
- PCIe6.0 Forward Error Correction
- PCI Express 6.0 Forward Error Correction
I am pleased to announce that PCI Express® 5.0 specification, Version 1.0— reaching 32GT/s transfer rates—has been released to our members in less than 2 years.
- Systems & Applications
- PCI-SIG
- PCIe 5.0
- PCI Express 5.0
- PCI-SIG Membership
PCI-SIG has built its reputation on delivering high quality PCI Express® (PCIe) specifications that have doubled bandwidth on average every three years, while maintaining full backwards compatibility with prior generations.
- Signal Integrity
- PCIe Lane Margining
- PCIe 4.0
- PCI Express 4.0
- PCIe Bandwidth
- PCIe retimers
- PCIe Test Equipment
By now, you probably know about the PCI-SIG Developers Conference which we hold in Santa Clara each year – a free event for our 750+ member companies with four tracks of presentations over two days.
- Standards & Compliance
- Technology
- PCI Express
- PCI-SIG
- Compliance
- Developers Conference
PCI Express® – also known as PCIe – used to get a bad rap for being power hungry on servers and PCs. But I’m happy to say that this is no longer the case. Are you aware that PCIe today is extremely power efficient with built-in low power features?
- Systems & Applications
- PCI-SIG
- PCI Express 3.0
- PCIe 3.0
- PCIe Latency
- PCIe low power
PCI Express® – also known as PCIe – used to get a bad rap for being power hungry on servers and PCs. But I’m happy to say that this is no longer the case. Are you aware that PCIe today is extremely power efficient with built-in low power features?
- Systems & Applications
- PCI-SIG
- PCI Express 3.0
- PCIe 3.0
- PCIe Latency
- PCIe low power
I recently attended the OCP Summit for the first time and I was impressed by the size of this growing event. The San Jose Convention Center was packed with industry experts – all eager to discuss how to move the Open Compute Project (OPC) forward.
- Systems & Applications
- PCI-SIG
- OCP Summit
- Open Compute Project
- PCIe 4.0
- PCI Express 4.0