Frequently Asked Questions

The following FAQ list was generated using standard responses provided to PCI-SIG members by Technical Support and PCI-SIG Administration. For questions relative to the PCI Specifications, please reference the specifications themselves as the authoritative text. 

PCI Express - M-PHY

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PCIe technology is in every server, workstation and laptop PC. Why is PCIe over M-PHY a suitable I/O technology for tablet and smartphone devices?

As a broadly adopted technology standard, PCIe benefits from several decades of innovations with universal support in all major Operating Systems, a robust device discovery and configuration mechanism, and comprehensive power management capabilities that very few, if any, of the other I/O technologies can match. PCIe technology has a flexible, layered protocol that enables innovations to occur at each layer of the architecture independent of the other layers. In this way, power-efficient PHY technologies, such as MIPI M-PHY, can be integrated with the familiar and highly functional PCIe protocol stack to deliver best-in-class and highly scalable I/O performance in tablet and smartphone devices.
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Why is PCI-SIG adapting PCIe protocols to operate over the MIPI M-PHY specification?

As PCs become lighter and thinner and tablets and smartphones become more functional, consumers want seamless, always on/always connected functionality from their computing devices. To respond to these market expectations, device manufacturers need efficient, intelligent I/O technologies. The PCIe architecture satisfies all of these requirements, and with the adaptation to operate over the M-PHY specification it can deliver consistent high performance in power-constrained platforms such as ULT laptops, tablets and smartphones. By delivering this technology, the PCI-SIG is meeting the emerging needs of its members and the industry.
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When and how will the PCI-SIG release the PCIe adaptation layer specification?

The PCI-SIG will deliver this technology as an extension to the existing PCIe 3.0 Base specification via ECN by the end of 2012. This technology will be fully integrated into the next release of the PCIe Base specification, PCIe 4.0, enabling ease of access and reference.

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