PCI-SIG Developers Conference Europe 2019 Agenda
Thursday, September 12, 2019 – Day 1
| Time | Title |
|---|---|
| 8:00 am - 9:00 am | Registration |
| 9:00 am - 10:30 am | PCI Express Basics & Background |
| 10:30 am - 11:00 am | AM Break & Exhibit |
| 11:00 am - 12:00 pm | PCIe 5.0 Electrical Update |
| 12:00 pm - 1:00 pm | Lunch & Exhibit |
| 1:00 pm - 2:00 pm | PCIe CEM 5.0 Previews |
| 2:00 pm - 3:00 pm | PCIe 5.0 Protocol Update |
| 3:00 pm - 3:30 pm | PM Break & Exhibit |
| 3:30 pm - 4:30 pm | PCIe 5.0 PHY Logical |
| 4:30 pm - 5:30 pm | PCIe Compliance Updates |
Friday, September 13, 2019 – Day 2
| Time | Title |
|---|---|
| 8:00 am - 8:30 am | Coffee & Exhibit |
| 8:30 am - 9:30 am | PCB Bandwidth Analysis for PCIe at 16GT/s and 32GT/s |
| 9:30 am - 10:30 am | PCI Express Link Training and Protocol Debug Techniques |
| 10:30 am - 11:00 am | AM Break and Exhibit |
| 11:00 am - 12:00 pm | Enable PCIe 5.0 System Design with Ethernet Architectures |
| 12:00 pm - 1:00 pm | Lunch and Exhibit |
| 1:00 pm - 2:00 pm | PCIe Architectures for Chip-to-Chip Interconnects |
| 2:00 pm - 3:00 pm | Correlating Methods and Demystifying 32GT/s Receiver Testing |
| 3:00 pm - 3:30 pm | PM Break & Exhibit |
| 3:30 pm - 4:30 pm | Sensor Fusion and Data-in-Motion Processing for Autonomous Vehicles |
| 4:30 pm - 5:30 pm | Reliability and Serviceability Features in a PCIe Controller |